IOb-SoC-Versat is a System-on-Chip (SoC) system designed to test Versat generated accelerators.
The first step is to clone this repository. IOb-SoC-Versat uses git sub-module trees and GitHub will ask for your password for each downloaded module if you clone it by https. To avoid this, setup GitHub access with ssh and type:
git clone --recursive [email protected]:IObundle/iob-soc-versat.git
cd iob-soc-versat
Alternatively, you can still clone this repository using https if you cache your credentials before cloning the repository using:
git config --global credential.helper 'cache --timeout <time_in_seconds>'
After cloning the repository and assuming you have all the dependencies installed, a test case can be tested by running the following commands:
make clean pc-emul-run TEST="TestName"
make clean sim-run TEST="TestName"
make clean fpga-run TEST="TestName"
TestName is the test's name. The firmware of the tests is contained inside the software/src/Tests folder, and the dataflow graphs they use are described in the file ./versatSpec.txt.
IOb-SoC-Versat is a system on chip based on IOb-SoC, which uses IOb-Versat as a peripheral for testing the latter. Refer to the IOb-SoC and IOb-Versat to install all the required dependencies.
IOb-SoC-Versat is licensed under the MIT License - see the LICENSE file for details.
This project is funded through the NGI Assure Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 957073.