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add checks for optional properties of FPGA iCE40 #80909
add checks for optional properties of FPGA iCE40 #80909
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Add checks in the GPIO bitbang mode to avoid a fault for missing configuration in the devicetree. Fixes zephyrproject-rtos#80850 Signed-off-by: Benedikt Schmidt <[email protected]>
if (config->set == NULL) { | ||
LOG_ERR("%s: set register was not specified", dev->name); | ||
return -EFAULT; | ||
} | ||
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if (config->clear == NULL) { | ||
LOG_ERR("%s: clear register was not specified", dev->name); | ||
return -EFAULT; | ||
} | ||
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It might be possible to move this check at build-time by removing the _OR
from here:
zephyr/drivers/fpga/fpga_ice40.c
Line 536 in 4bb9453
#define FPGA_ICE40_GPIO_PINS(inst, name) (volatile gpio_port_pins_t *)DT_INST_PROP_OR(inst, name, 0) |
But it is still allowed to be empty for SPI, so it could be some build assert checking FPGA_ICE40_LOAD_MODE(inst)
eventually.
A run-time check is good too!
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+1 for build-time checks.
@benediktibk - I would fully support moving these checks to build-time if that works. It's possible that the build_all tests would need to have some arbitrary gpio present. |
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Thanks for the fix @benediktibk
Add checks in the GPIO bitbang mode to avoid a fault for missing configuration in the devicetree.
Fixes #80850