The FPGA based correlator for the TART-3 telescope is based around a 20k LUT Gowin FPGA with 1 Gbit DDR3 RAM. The module is the (https://wiki.sipeed.com/hardware/en/tang/tang-primer-20k/primer-20k.html)[Tang Primer 20k] from Sipeed.
Structure
- config: files for telescope config, to be used as input by the correlator generator.