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Exectute build/refresh.sh.
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dot-asm committed Sep 23, 2023
1 parent 5133483 commit 3f3457c
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Showing 12 changed files with 741 additions and 741 deletions.
4 changes: 2 additions & 2 deletions build/coff/add_mod_384-armv8.S
Original file line number Diff line number Diff line change
Expand Up @@ -1017,7 +1017,7 @@ vec_is_zero_16x:
.Loop_is_zero_done:
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
csel x0, x0, xzr, eq
Expand Down Expand Up @@ -1048,7 +1048,7 @@ vec_is_equal_16x:
.Loop_is_equal_done:
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
csel x0, x0, xzr, eq
Expand Down
4 changes: 2 additions & 2 deletions build/elf/add_mod_384-armv8.S
Original file line number Diff line number Diff line change
Expand Up @@ -963,7 +963,7 @@ vec_is_zero_16x:
.Loop_is_zero_done:
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
csel x0, x0, xzr, eq
Expand Down Expand Up @@ -992,7 +992,7 @@ vec_is_equal_16x:
.Loop_is_equal_done:
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
csel x0, x0, xzr, eq
Expand Down
4 changes: 2 additions & 2 deletions build/mach-o/add_mod_384-armv8.S
Original file line number Diff line number Diff line change
Expand Up @@ -963,7 +963,7 @@ Loop_is_zero:
Loop_is_zero_done:
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
csel x0, x0, xzr, eq
Expand Down Expand Up @@ -992,7 +992,7 @@ Loop_is_equal:
Loop_is_equal_done:
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
csel x0, x0, xzr, eq
Expand Down
20 changes: 10 additions & 10 deletions build/win64/add_mod_256-armv8.asm
Original file line number Diff line number Diff line change
Expand Up @@ -234,12 +234,12 @@
ldp x4,x5,[x1]
ldp x6,x7,[x1,#16]

#ifdef __AARCH64EB__
if :def: __AARCH64EB__
rev x8,x8
rev x9,x9
rev x10,x10
rev x11,x11
#endif
endif

subs xzr,x8,x4
sbcs xzr,x9,x5
Expand Down Expand Up @@ -268,7 +268,7 @@
ldp x10,x11,[x1,#16]
ldp x14,x15,[x2,#16]

#ifdef __AARCH64EB__
if :def: __AARCH64EB__
rev x8,x8
rev x12,x12
rev x9,x9
Expand All @@ -277,7 +277,7 @@
rev x14,x14
rev x11,x11
rev x15,x15
#endif
endif

adds x8,x8,x12
ldp x4,x5,[x3]
Expand All @@ -302,12 +302,12 @@
orr x17, x10, x11
orr x16, x16, x17

#ifdef __AARCH64EB__
if :def: __AARCH64EB__
rev x8,x8
rev x9,x9
rev x10,x10
rev x11,x11
#endif
endif

stp x8,x9,[x0]
stp x10,x11,[x0,#16]
Expand All @@ -329,7 +329,7 @@
ldp x10,x11,[x1,#16]
ldp x14,x15,[x2,#16]

#ifdef __AARCH64EB__
if :def: __AARCH64EB__
rev x8,x8
rev x12,x12
rev x9,x9
Expand All @@ -338,7 +338,7 @@
rev x14,x14
rev x11,x11
rev x15,x15
#endif
endif

subs x8,x8,x12
sbcs x9,x9,x13
Expand All @@ -361,12 +361,12 @@
orr x17, x10, x11
orr x16, x16, x17

#ifdef __AARCH64EB__
if :def: __AARCH64EB__
rev x8,x8
rev x9,x9
rev x10,x10
rev x11,x11
#endif
endif

stp x8,x9,[x0]
stp x10,x11,[x0,#16]
Expand Down
12 changes: 6 additions & 6 deletions build/win64/add_mod_384-armv8.asm
Original file line number Diff line number Diff line change
Expand Up @@ -154,7 +154,7 @@
adcs x13,x13,x20
and x22,x22,x9
adcs x14,x14,x21
extr x10,x11,x10,#1 // a[0:5] >>= 1
extr x10,x11,x10,#1
adcs x15,x15,x22
extr x11,x12,x11,#1
adc x22,xzr,xzr
Expand Down Expand Up @@ -604,7 +604,7 @@
ldp x8,x9,[x2,#32]
add x2,x1,#48

bl __sub_mod_384 // a->re - a->im
bl __sub_mod_384

ldp x16,x17,[x1]
ldp x19,x20,[x1,#16]
Expand All @@ -616,7 +616,7 @@
stp x14,x15,[x0,#32]
ldp x14,x15,[x1,#80]

bl __add_mod_384_ab_are_loaded // a->re + a->im
bl __add_mod_384_ab_are_loaded
ldr x30,[sp,#8]

stp x10,x11,[x0,#48]
Expand Down Expand Up @@ -744,7 +744,7 @@

and x3,x3,#1
and x1,x1,#2
orr x0,x1,x3 // pack sign and parity
orr x0,x1,x3

ret
ENDP
Expand Down Expand Up @@ -963,7 +963,7 @@
|$Loop_is_zero_done|
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
cseleq x0,x0,xzr
Expand Down Expand Up @@ -992,7 +992,7 @@
|$Loop_is_equal_done|
dup v1.2d, v0.d[1]
orr v0.16b, v0.16b, v1.16b
mov x1, v0.d[0]
umov x1, v0.d[0]
mov x0, #1
cmp x1, #0
cseleq x0,x0,xzr
Expand Down
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