Skip to content

Commit

Permalink
[sw] cleanup clint.mtimecmp calls
Browse files Browse the repository at this point in the history
  • Loading branch information
stnolting committed Dec 30, 2024
1 parent 635e6d2 commit bc4c638
Show file tree
Hide file tree
Showing 3 changed files with 16 additions and 16 deletions.
2 changes: 1 addition & 1 deletion sw/bootloader/bootloader.c
Original file line number Diff line number Diff line change
Expand Up @@ -483,7 +483,7 @@ void __attribute__((interrupt("machine"))) bootloader_trap_handler(void) {
#endif
// set time for next IRQ
if (neorv32_clint_available()) {
neorv32_clint_mtimecmp_set(0, neorv32_clint_time_get() + (NEORV32_SYSINFO->CLK/4));
neorv32_clint_mtimecmp_set(neorv32_clint_time_get() + (NEORV32_SYSINFO->CLK/4));
}
}

Expand Down
14 changes: 7 additions & 7 deletions sw/example/demo_clint/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ int main() {
neorv32_uart0_printf("Unix timestamp: %u\n", (uint32_t)neorv32_clint_unixtime_get);

// configure MTIME timer to not trigger
neorv32_clint_mtimecmp_set(0, -1);
neorv32_clint_mtimecmp_set(-1);

// install CLINT handlers to RTE
neorv32_rte_handler_install(RTE_TRAP_MTI, mti_irq_handler);
Expand All @@ -80,7 +80,7 @@ int main() {
neorv32_uart0_printf("\nStarting real-time clock demo...\n");

// configure MTIME timer's first interrupt to trigger after 1 second starting from now
neorv32_clint_mtimecmp_set(0, neorv32_clint_time_get() + neorv32_sysinfo_get_clk());
neorv32_clint_mtimecmp_set(neorv32_clint_time_get() + neorv32_sysinfo_get_clk());

// enable machine time and software interrupts
neorv32_cpu_csr_set(CSR_MIE, (1 << CSR_MIE_MTIE) + (1 << CSR_MIE_MSIE));
Expand All @@ -104,13 +104,13 @@ int main() {
void mti_irq_handler(void) {

// configure MTIME timer's next interrupt to trigger after 1 second starting from now
neorv32_clint_mtimecmp_set(0, neorv32_clint_mtimecmp_get(0) + neorv32_sysinfo_get_clk());
neorv32_clint_mtimecmp_set(neorv32_clint_mtimecmp_get() + neorv32_sysinfo_get_clk());

// toggle output port bit 0
neorv32_gpio_pin_toggle(0);

// trigger software interrupt (just for fun)
neorv32_clint_msi_set(0);
// trigger software interrupt for this core (just for fun)
neorv32_clint_msi_set(neorv32_cpu_csr_read(CSR_MHARTID));

// show date in human-readable format
date_t date;
Expand All @@ -127,8 +127,8 @@ void mti_irq_handler(void) {
**************************************************************************/
void msi_irq_handler(void) {

// clear machine software interrupt
NEORV32_CLINT->MSWI[0] = 0;
// clear machine software interrupt for this core
neorv32_clint_msi_clr(neorv32_cpu_csr_read(CSR_MHARTID));

neorv32_uart0_printf("\n[Machine Software Interrupt!]\n");
}
16 changes: 8 additions & 8 deletions sw/example/processor_check/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -139,7 +139,7 @@ int main() {
}

// set CMP of CLINT MTIMER to max to prevent an IRQ
neorv32_clint_mtimecmp_set(0, -1);
neorv32_clint_mtimecmp_set(-1);
neorv32_clint_time_set(0);

// get number of implemented PMP regions
Expand Down Expand Up @@ -787,7 +787,7 @@ int main() {
cnt_test++;

// configure MTIMER (and check overflow from low word to high word)
neorv32_clint_mtimecmp_set(0, 0x0000000100000000ULL);
neorv32_clint_mtimecmp_set(0x0000000100000000ULL);
neorv32_clint_time_set(0x00000000FFFFFFFEULL);
// enable interrupt
neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE);
Expand All @@ -808,7 +808,7 @@ int main() {
}

// no more MTIME interrupts
neorv32_clint_mtimecmp_set(0, -1);
neorv32_clint_mtimecmp_set(-1);
}
else {
PRINT_STANDARD("[n.a.]\n");
Expand Down Expand Up @@ -894,7 +894,7 @@ int main() {

// fire CLINT.MTIMER IRQ
neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE);
neorv32_clint_mtimecmp_set(0, 0); // force interrupt
neorv32_clint_mtimecmp_set(0); // force interrupt

volatile int test_cnt = 0;

Expand Down Expand Up @@ -929,7 +929,7 @@ int main() {
neorv32_cpu_csr_write(CSR_MIE, 0);

// fire CLINT.MTIMER IRQ
neorv32_clint_mtimecmp_set(0, 0); // force interrupt
neorv32_clint_mtimecmp_set(0); // force interrupt

// wait some time for the IRQ to arrive the CPU
asm volatile ("nop");
Expand All @@ -938,7 +938,7 @@ int main() {
uint32_t was_pending = neorv32_cpu_csr_read(CSR_MIP) & (1 << CSR_MIP_MTIP); // should be pending now

// clear pending MTI
neorv32_clint_mtimecmp_set(0, -1);
neorv32_clint_mtimecmp_set(-1);

uint32_t is_pending = neorv32_cpu_csr_read(CSR_MIP) & (1 << CSR_MIP_MTIP); // should NOT be pending anymore

Expand Down Expand Up @@ -1770,7 +1770,7 @@ int main() {
cnt_test++;

// program wake-up timer
neorv32_clint_mtimecmp_set(0, neorv32_clint_time_get() + 300);
neorv32_clint_mtimecmp_set(neorv32_clint_time_get() + 300);

// enable CLINT.MTIMER interrupt
neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE);
Expand Down Expand Up @@ -1812,7 +1812,7 @@ int main() {
neorv32_cpu_csr_clr(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE);

// program wake-up timer
neorv32_clint_mtimecmp_set(0, neorv32_clint_time_get() + 300);
neorv32_clint_mtimecmp_set(neorv32_clint_time_get() + 300);

// enable machine timer interrupt
neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE);
Expand Down

0 comments on commit bc4c638

Please sign in to comment.