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Expose configuration of the SEVONPEND bit within the System Control Register (SCR) #337

Expose configuration of the SEVONPEND bit within the System Control Register (SCR)

Expose configuration of the SEVONPEND bit within the System Control Register (SCR) #337

Triggered via pull request June 23, 2024 06:03
Status Failure
Total duration 48s
Artifacts 1

on-target.yml

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hil-stm32
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