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UIO_010 clarification attempt for https://github.com/riscv-non-isa/ri… #207

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merged 1 commit into from
Nov 8, 2024

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@andreiw andreiw commented Nov 6, 2024

…scv-brs/issues/200

Signed-off-by: Andrei Warkentin <[email protected]>
@andreiw andreiw requested a review from vlsunil November 6, 2024 18:04
@andreiw andreiw mentioned this pull request Nov 6, 2024
descriptions in ACPI and DT. Furthermore, firmware MUST perform BAR resource assignment,
bridge bus number and window assignments and other reasonable device setting configuration
(e.g. Max Payload Size) and not assume operating systems to be capable of full PCIe
resource configuration, or to expect full reconfiguration to be necessary.
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LGTM. However, when FW allocates the resources it needs to communicate to the OS that they should be preserved (via _DSM in ACPI) . Should we add that requirement as well? REF: PCI FW SPEC 4.6.5.

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Don't have a strong opinion on this one. I'm more concerned about requiring OS behavior. I think FW requesting resources to be preserved is more of a platform choice (tbh, I can only think of scenarios where the OS can't correctly reconfigure due to PCIe support being not compliant).

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Actually I'm pretty confident a blanket policy of requesting OS to preserve configuration is wrong. That may be a necessity in some designs, but cannot be a requirement.

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Yeah, agreed. Thanks!

@andreiw andreiw merged commit f967ab2 into main Nov 8, 2024
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2 participants