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Draft: Add m-mode, s-mode CLIC interrupt testcases #436

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Draft: Add m-mode, s-mode CLIC interrupt testcases #436

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c239aef
Draft: Add m-mode CLIC interrupt testcases
dansmathers Feb 8, 2024
09cb8de
Draft: Add m-mode CLIC interrupt testcases
dansmathers Feb 8, 2024
68e9b39
Draft: Add s-mode CLIC interrupt testcases
dansmathers Feb 9, 2024
35ee9c1
Draft: Add s-mode CLIC interrupt testcases
dansmathers Feb 9, 2024
2e3b80b
Draft: Add m/s-mode CLIC interrupt testcases
dansmathers Feb 9, 2024
599b1e0
increased size of signature region, normalized nxti checking
dansmathers Mar 1, 2024
880f3ec
normalized nxti checking
dansmathers Mar 1, 2024
5178979
adding shv testcases
dansmathers May 2, 2024
d57ca3a
clicshv tests - draft.
dansmathers May 2, 2024
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54 changes: 54 additions & 0 deletions coverage/rvi_smclic.cgf
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,54 @@
clicdirect-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

cliclevel-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

cliclevel-02:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

cliclevel-03:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

cliclevel-04:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

clicnomint-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

clicnomint-02:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

clicnomint-03:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

clicwfi-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

96 changes: 96 additions & 0 deletions coverage/rvi_ssclic.cgf
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,96 @@
sclicdeleg-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicmdisable-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

sclicmdisable-02:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

sclicmdisable-03:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

sclicnodeleg-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicorder-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicorder-02:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicorder-03:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicorder-04:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicprivorder-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicprivorder-02:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicprivorder-03:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

sclicsdisable-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

sclicsdisable-02:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

sclicsdisable-03:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 0: 0

sclicwfi-01:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
csr_comb:
mcause >> (xlen-1) == 1: 0

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