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Welcome to the phaser DSP gateware wiki!
This wiki contains information on the Phaser AWG signal flows on a functional level. For information about the hardware see Phaser Sinara wiki. For the low lever API driver functions please refer to the official ARTIQ documentation.
In the default, "classic" configuration, Phaser functions as a versatile, precision RF synthesizer of up to 5 tones per channel. The phase relation between the tones can be set with 16 bit (~30 urad) accuracy and the frequency relation with 32 bit (~2.9 mHz) accuracy.
The tones can be upconverted to a desired RF window using a combination of two digital upconverters (DUC) and a final I/Q modulator (for Phaser RF). This combination allows for flexibility in the spectral conversion process. By leaving the DAC DUC and the analog PLL at a fixed frequency relation, LO leakage and other artifacts can be placed outside the band of interest. The FPGA DUC can then be used to quickly change the placement of the tones.
All of the settings in the digital signal path can be changed with deterministic latency. Therefore phase relations between the tones can be conserved over changes in frequency/phase.
Care has to be taken when choosing tone/upconverter frequencies to not create a configuration that cannot be synthesized correctly. There are several places where the signal is filtered and therefore attenuated in the transition bands. Additionally the signal can alias back to another place in the spectrum if a frequency would be higher than the Nyquist frequency. Signal overflow can happen at the summation of the tones if each tone already occupies a large dynamic range with no headroom.
The DSP part achieves ~80 dB SNR for a single tone.
The wiki for the STFT pulse generator can be found here.