vcs-sim: Add scripts to run VCS sims

.gitlab-ci.yml

@@ -5,6 +5,10 @@ before_script:
   - export PATH=~/.cargo/bin:$PATH
   - mkdir -p build
 
+stages:
+  - build
+  - test
+
 vsim:
   stage: build
   script:
@@ -179,3 +183,103 @@ axi_xbar:
   <<: *run_vsim
   variables:
     TEST_MODULE: axi_xbar
+
+vcs_axi_addr_test:
+  stage: test
+  script:
+    - make sim_vcs-axi_addr_test.log
+
+vcs_axi_atop_filter:
+  stage: test
+  script:
+    - make sim_vcs-axi_atop_filter.log
+
+vcs_axi_cdc:
+  stage: test
+  script:
+    - make sim_vcs-axi_cdc.log
+
+vcs_axi_delayer:
+  stage: test
+  script:
+    - make sim_vcs-axi_delayer.log
+
+vcs_axi_dw_downsizer:
+  stage: test
+  script:
+    - make sim_vcs-axi_dw_downsizer.log
+
+vcs_axi_dw_upsizer:
+  stage: test
+  script:
+    - make sim_vcs-axi_dw_upsizer.log
+
+vcs_axi_fifo:
+  stage: test
+  script:
+    - make sim_vcs-axi_fifo.log
+
+vcs_axi_isolate:
+  stage: test
+  script:
+    - make sim_vcs-axi_isolate.log
+
+vcs_axi_iw_converter:
+  stage: test
+  script:
+    - make sim_vcs-axi_iw_converter.log
+
+vcs_axi_lite_regs:
+  stage: test
+  script:
+    - make sim_vcs-axi_lite_regs.log
+
+vcs_axi_lite_to_apb:
+  stage: test
+  script:
+    - make sim_vcs-axi_lite_to_apb.log
+
+vcs_axi_lite_to_axi:
+  stage: test
+  script:
+    - make sim_vcs-axi_lite_to_axi.log
+
+vcs_axi_lite_mailbox:
+  stage: test
+  script:
+    - make sim_vcs-axi_lite_mailbox.log
+
+vcs_axi_lite_xbar:
+  stage: test
+  script:
+    - make sim_vcs-axi_lite_xbar.log
+
+vcs_axi_modify_address:
+  stage: test
+  script:
+    - make sim_vcs-axi_modify_address.log
+
+vcs_axi_serializer:
+  stage: test
+  script:
+    - make sim_vcs-axi_serializer.log
+
+vcs_axi_sim_mem:
+  stage: test
+  script:
+    - make sim_vcs-axi_sim_mem.log
+
+vcs_axi_to_axi_lite:
+  stage: test
+  script:
+    - make sim_vcs-axi_to_axi_lite.log
+
+vcs_axi_to_mem_banked:
+  stage: test
+  script:
+    - make sim_vcs-axi_to_mem_banked.log
+
+vcs_axi_xbar:
+  stage: test
+  script:
+    - make sim_vcs-axi_xbar.log

Makefile

@@ -14,37 +14,51 @@
 ifneq (,$(wildcard /etc/iis.version))
 	VSIM        ?= questa-2022.3 vsim
 	SYNOPSYS_DC ?= synopsys-2022.03 dcnxt_shell
+	VLOGAN      ?= vcs-2020.12 vlogan
+	VCS         ?= vcs-2020.12 vcs
 else
 	VSIM        ?= vsim
 	SYNOPSYS_DC ?= dc_shell
+	VLOGAN      ?= vlogan
+	VCS         ?= vcs
 endif
 
+# VCS_DEBUG ?= -debug_access+r
+VCS_DEBUG ?= -debug_access+nomemcbk
+VCS_XPROP ?= -xprop=xmerge
+VCS_OPT   ?= $(VCS_XPROP) $(VCS_DEBUG) -full64 -CFLAGS \"-O4\" -O4 -j9
+
 TBS         ?= axi_addr_test \
                axi_atop_filter \
-               axi_cdc axi_delayer \
+               axi_bus_compare \
+               axi_cdc \
+               axi_delayer \
                axi_dw_downsizer \
                axi_dw_upsizer \
                axi_fifo \
                axi_isolate \
                axi_iw_converter \
+               axi_lite_mailbox \
                axi_lite_regs \
                axi_lite_to_apb \
                axi_lite_to_axi \
-               axi_lite_mailbox \
                axi_lite_xbar \
                axi_modify_address \
                axi_serializer \
                axi_sim_mem \
+               axi_slave_compare \
                axi_to_axi_lite \
                axi_to_mem_banked \
                axi_xbar
 
-SIM_TARGETS := $(addsuffix .log,$(addprefix sim-,$(TBS)))
+
+SIM_TARGETS     := $(addsuffix .log,$(addprefix sim-,$(TBS)))
+SIMVCS_TARGETS := $(addsuffix .log,$(addprefix sim_vcs-,$(TBS)))
 
 
 .SHELL: bash
 
-.PHONY: help all sim_all clean
+.PHONY: help all sim_all sim_vcs_all clean
 
 
 help:
@@ -65,6 +79,9 @@ all: compile.log elab.log sim_all
 sim_all: $(SIM_TARGETS)
 
 
+sim_vcs_all: $(SIMVCS_TARGETS)
+
+
 build:
 	mkdir -p $@
 
@@ -85,6 +102,17 @@ sim-%.log: compile.log
 	(! grep -n "Fatal:" $@)
 
 
+compile_vcs.log: Bender.yml | build
+	export VLOGAN="$(VLOGAN)"; cd build && ../scripts/compile_vcs.sh | tee ../$@
+	(! grep -n "Error-" $@)
+
+
+sim_vcs-%.log: compile_vcs.log
+	export VCS="$(VCS)"; export VCS_OPT="$(VCS_OPT)"; cd build && ../scripts/run_vcs.sh --random-seed $* | tee ../$@
+	(! grep -n "Error" $@)
+	(! grep -n "Fatal" $@)
+
+
 clean:
 	rm -rf build
 	rm -f  *.log

scripts/compile_vcs.sh

@@ -0,0 +1,30 @@
+#!/bin/bash
+# Copyright (c) 2022 ETH Zurich, University of Bologna
+#
+# Copyright and related rights are licensed under the Solderpad Hardware
+# License, Version 0.51 (the "License"); you may not use this file except in
+# compliance with the License.  You may obtain a copy of the License at
+# http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
+# or agreed to in writing, software, hardware and materials distributed under
+# this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+# CONDITIONS OF ANY KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations under the License.
+#
+# Authors:
+# - Thomas Benz <[email protected]>
+
+set -e
+
+[ ! -z "$VLOGAN" ] || VLOGAN=vlogan
+
+bender script vcs -t test -t rtl -t simulation \
+    --vlog-arg="-full64" \
+    --vlog-arg="-nc" \
+    --vlog-arg="-q" \
+    --vlog-arg="-assert svaext" \
+    --vlog-arg="-timescale=1ns/1ps" \
+    --vlogan-bin="$VLOGAN" \
+    | grep -v "ROOT=" | sed '3 i ROOT="../"' \
+    > compile_vcs.sh
+
+source compile_vcs.sh