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diff --git a/master/index.html b/master/index.html
@@ -1,4 +1,4 @@
-<!-- Compiled by morty-0.9.0 / 2024-12-10 20:56:51.873696348 +00:00 -->
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.204776558 +00:00 -->
 
 <html>
 <link rel="stylesheet" type="text/css" href="static/rustdoc.css">
@@ -18,6 +18,9 @@ <h2 id="modules">Modules</h2>
 </td></tr><tr><td><a class="module" href="module.axi_burst_splitter.html">axi_burst_splitter</a></td><td><p>Split AXI4 bursts into single-beat transactions.</p>
 </td></tr><tr><td><a class="module" href="module.axi_burst_splitter_ax_chan.html">axi_burst_splitter_ax_chan</a></td><td><p>Internal module of <a href="module.axi_burst_splitter"><code>axi_burst_splitter</code></a> to control Ax channels.</p>
 </td></tr><tr><td><a class="module" href="module.axi_burst_splitter_counters.html">axi_burst_splitter_counters</a></td><td><p>Internal module of <a href="module.axi_burst_splitter"><code>axi_burst_splitter</code></a> to order transactions.</p>
+</td></tr><tr><td><a class="module" href="module.axi_burst_unwrap.html">axi_burst_unwrap</a></td><td><p>Splits wrapping AXI4 bursts into incremental bursts.</p>
+</td></tr><tr><td><a class="module" href="module.axi_burst_unwrap_ax_chan.html">axi_burst_unwrap_ax_chan</a></td><td><p>Internal module of <a href="module.axi_burst_splitter"><code>axi_burst_splitter</code></a> to control Ax channels.</p>
+</td></tr><tr><td><a class="module" href="module.axi_burst_counters.html">axi_burst_counters</a></td><td><p>Internal module of <a href="module.axi_burst_splitter"><code>axi_burst_splitter</code></a> to order transactions.</p>
 </td></tr><tr><td><a class="module" href="module.axi_bus_compare.html">axi_bus_compare</a></td><td><p>Synthesizable test module comparing two AXI channels of the same type</p>
 </td></tr><tr><td><a class="module" href="module.axi_cdc.html">axi_cdc</a></td><td><p>A clock domain crossing on an AXI interface.</p>
 </td></tr><tr><td><a class="module" href="module.axi_cdc_intf.html">axi_cdc_intf</a></td><td></td></tr><tr><td><a class="module" href="module.axi_lite_cdc_intf.html">axi_lite_cdc_intf</a></td><td></td></tr><tr><td><a class="module" href="module.axi_cdc_dst.html">axi_cdc_dst</a></td><td><p>Destination-clock-domain half of the AXI CDC crossing.</p>

diff --git a/master/module.axi_atop_filter.html b/master/module.axi_atop_filter.html
@@ -1,4 +1,4 @@
-<!-- Compiled by morty-0.9.0 / 2024-12-10 20:56:51.889639481 +00:00 -->
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.213449694 +00:00 -->
 
 <html>
 <link rel="stylesheet" type="text/css" href="static/rustdoc.css">

diff --git a/master/module.axi_atop_filter_intf.html b/master/module.axi_atop_filter_intf.html
@@ -1,4 +1,4 @@
-<!-- Compiled by morty-0.9.0 / 2024-12-10 20:56:51.891869180 +00:00 -->
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.214447540 +00:00 -->
 
 <html>
 <link rel="stylesheet" type="text/css" href="static/rustdoc.css">

diff --git a/master/module.axi_burst_counters.html b/master/module.axi_burst_counters.html
@@ -0,0 +1,40 @@
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.219755145 +00:00 -->
+
+<html>
+<link rel="stylesheet" type="text/css" href="static/rustdoc.css">
+<link rel="stylesheet" type="text/css" href="static/light.css">
+<link rel="stylesheet" type="text/css" href="static/svdoc.css">
+<body>
+<section id="main" class="content"><h1 class="fqn">Module <a class="module">axi_burst_counters</a></h1>
+<div class="docblock">
+<p>Internal module of <a href="module.axi_burst_splitter"><code>axi_burst_splitter</code></a> to order transactions.</p>
+</div>
+<h2 id="parameters" class="section-header"><a href="#parameters">Parameters</a></h2>
+<h3 id="parameter.MaxTxns" class="impl"><code class="in-band"><a href="#parameter.MaxTxns">MaxTxns</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.IdWidth" class="impl"><code class="in-band"><a href="#parameter.IdWidth">IdWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.id_t" class="impl"><code class="in-band"><a href="#parameter.id_t">id_t</a><span class="type-annotation">: type</span></code></h3><div class="docblock">
+</div><h3 id="parameter.CntIdxWidth" class="impl"><code class="in-band"><a href="#parameter.CntIdxWidth">CntIdxWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h2 id="ports" class="section-header"><a href="#ports">Ports</a></h2>
+<h3 id="port.clk_i" class="impl"><code class="in-band"><a href="#port.clk_i">clk_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.rst_ni" class="impl"><code class="in-band"><a href="#port.rst_ni">rst_ni</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.alloc_id_i" class="impl"><code class="in-band"><a href="#port.alloc_id_i">alloc_id_i</a><span class="type-annotation">: input  id_t</span></code></h3><div class="docblock">
+</div><h3 id="port.alloc_len_i" class="impl"><code class="in-band"><a href="#port.alloc_len_i">alloc_len_i</a><span class="type-annotation">: input  axi_pkg::len_t</span></code></h3><div class="docblock">
+</div><h3 id="port.alloc_req_i" class="impl"><code class="in-band"><a href="#port.alloc_req_i">alloc_req_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.alloc_gnt_o" class="impl"><code class="in-band"><a href="#port.alloc_gnt_o">alloc_gnt_o</a><span class="type-annotation">: output logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_id_i" class="impl"><code class="in-band"><a href="#port.cnt_id_i">cnt_id_i</a><span class="type-annotation">: input  id_t</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_len_o" class="impl"><code class="in-band"><a href="#port.cnt_len_o">cnt_len_o</a><span class="type-annotation">: output axi_pkg::len_t</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_set_err_i" class="impl"><code class="in-band"><a href="#port.cnt_set_err_i">cnt_set_err_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_err_o" class="impl"><code class="in-band"><a href="#port.cnt_err_o">cnt_err_o</a><span class="type-annotation">: output logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_dec_i" class="impl"><code class="in-band"><a href="#port.cnt_dec_i">cnt_dec_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_req_i" class="impl"><code class="in-band"><a href="#port.cnt_req_i">cnt_req_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_gnt_o" class="impl"><code class="in-band"><a href="#port.cnt_gnt_o">cnt_gnt_o</a><span class="type-annotation">: output logic</span></code></h3><div class="docblock">
+</div><h2 id="types" class="section-header"><a href="#types">Types<a></h2>
+<table>
+<tr><td><a class="type" href="type.cnt_idx_t.html">cnt_idx_t</a></td><td></td></tr><tr><td><a class="type" href="type.cnt_t.html">cnt_t</a></td><td></td></tr></table>
+<h2 id="signals" class="section-header"><a href="#signals">Signals</a></h2>
+<h3 id="signal.cnt_inp" class="impl"><code class="in-band"><a href="#signal.cnt_inp">cnt_inp</a><span class="type-annotation">: cnt_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.cnt_free_idx" class="impl"><code class="in-band"><a href="#signal.cnt_free_idx">cnt_free_idx</a><span class="type-annotation">: cnt_idx_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.cnt_r_idx" class="impl"><code class="in-band"><a href="#signal.cnt_r_idx">cnt_r_idx</a><span class="type-annotation">: cnt_idx_t</span></code></h3><div class="docblock">
+</div></section>
+</body>
+</html>
diff --git a/master/module.axi_burst_splitter.html b/master/module.axi_burst_splitter.html
@@ -1,4 +1,4 @@
-<!-- Compiled by morty-0.9.0 / 2024-12-10 20:56:51.894542626 +00:00 -->
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.215716501 +00:00 -->
 
 <html>
 <link rel="stylesheet" type="text/css" href="static/rustdoc.css">

diff --git a/master/module.axi_burst_splitter_ax_chan.html b/master/module.axi_burst_splitter_ax_chan.html
@@ -1,4 +1,4 @@
-<!-- Compiled by morty-0.9.0 / 2024-12-10 20:56:51.896938734 +00:00 -->
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.217051184 +00:00 -->
 
 <html>
 <link rel="stylesheet" type="text/css" href="static/rustdoc.css">

diff --git a/master/module.axi_burst_splitter_counters.html b/master/module.axi_burst_splitter_counters.html
@@ -1,4 +1,4 @@
-<!-- Compiled by morty-0.9.0 / 2024-12-10 20:56:51.897845095 +00:00 -->
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.217508004 +00:00 -->
 
 <html>
 <link rel="stylesheet" type="text/css" href="static/rustdoc.css">

diff --git a/master/module.axi_burst_unwrap.html b/master/module.axi_burst_unwrap.html
@@ -0,0 +1,47 @@
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.217993708 +00:00 -->
+
+<html>
+<link rel="stylesheet" type="text/css" href="static/rustdoc.css">
+<link rel="stylesheet" type="text/css" href="static/light.css">
+<link rel="stylesheet" type="text/css" href="static/svdoc.css">
+<body>
+<section id="main" class="content"><h1 class="fqn">Module <a class="module">axi_burst_unwrap</a></h1>
+<div class="docblock">
+<p>Splits wrapping AXI4 bursts into incremental bursts.</p>
+<h2>Limitations</h2>
+<ul>
+<li>
+<p>This module does not support atomic operations (ATOPs) and responds to ATOPs with a slave</p>
+<p>error.  Place an <a href="module.axi_atop_filter"><code>axi_atop_filter</code></a> before this module if upstream</p>
+<p>modules can generate ATOPs.</p>
+</li>
+</ul>
+</div>
+<h2 id="parameters" class="section-header"><a href="#parameters">Parameters</a></h2>
+<h3 id="parameter.MaxReadTxns" class="impl"><code class="in-band"><a href="#parameter.MaxReadTxns">MaxReadTxns</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.MaxWriteTxns" class="impl"><code class="in-band"><a href="#parameter.MaxWriteTxns">MaxWriteTxns</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.AddrWidth" class="impl"><code class="in-band"><a href="#parameter.AddrWidth">AddrWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.DataWidth" class="impl"><code class="in-band"><a href="#parameter.DataWidth">DataWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.IdWidth" class="impl"><code class="in-band"><a href="#parameter.IdWidth">IdWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.UserWidth" class="impl"><code class="in-band"><a href="#parameter.UserWidth">UserWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.axi_req_t" class="impl"><code class="in-band"><a href="#parameter.axi_req_t">axi_req_t</a><span class="type-annotation">: type</span></code></h3><div class="docblock">
+</div><h3 id="parameter.axi_resp_t" class="impl"><code class="in-band"><a href="#parameter.axi_resp_t">axi_resp_t</a><span class="type-annotation">: type</span></code></h3><div class="docblock">
+</div><h3 id="parameter.MaxTxns" class="impl"><code class="in-band"><a href="#parameter.MaxTxns">MaxTxns</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h2 id="ports" class="section-header"><a href="#ports">Ports</a></h2>
+<h3 id="port.clk_i" class="impl"><code class="in-band"><a href="#port.clk_i">clk_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.rst_ni" class="impl"><code class="in-band"><a href="#port.rst_ni">rst_ni</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.slv_req_i" class="impl"><code class="in-band"><a href="#port.slv_req_i">slv_req_i</a><span class="type-annotation">: input  axi_req_t</span></code></h3><div class="docblock">
+</div><h3 id="port.slv_resp_o" class="impl"><code class="in-band"><a href="#port.slv_resp_o">slv_resp_o</a><span class="type-annotation">: output axi_resp_t</span></code></h3><div class="docblock">
+</div><h3 id="port.mst_req_o" class="impl"><code class="in-band"><a href="#port.mst_req_o">mst_req_o</a><span class="type-annotation">: output axi_req_t</span></code></h3><div class="docblock">
+</div><h3 id="port.mst_resp_i" class="impl"><code class="in-band"><a href="#port.mst_resp_i">mst_resp_i</a><span class="type-annotation">: input  axi_resp_t</span></code></h3><div class="docblock">
+</div><h2 id="types" class="section-header"><a href="#types">Types<a></h2>
+<table>
+<tr><td><a class="type" href="type.addr_t.html">addr_t</a></td><td></td></tr><tr><td><a class="type" href="type.data_t.html">data_t</a></td><td></td></tr><tr><td><a class="type" href="type.id_t.html">id_t</a></td><td></td></tr><tr><td><a class="type" href="type.strb_t.html">strb_t</a></td><td></td></tr><tr><td><a class="type" href="type.user_t.html">user_t</a></td><td></td></tr><tr><td><a class="type" href="type.aw_chan_t.html">aw_chan_t</a></td><td></td></tr><tr><td><a class="type" href="type.w_chan_t.html">w_chan_t</a></td><td></td></tr><tr><td><a class="type" href="type.b_chan_t.html">b_chan_t</a></td><td></td></tr><tr><td><a class="type" href="type.ar_chan_t.html">ar_chan_t</a></td><td></td></tr><tr><td><a class="type" href="type.r_chan_t.html">r_chan_t</a></td><td></td></tr></table>
+<h2 id="signals" class="section-header"><a href="#signals">Signals</a></h2>
+<h3 id="signal.act_req" class="impl"><code class="in-band"><a href="#signal.act_req">act_req</a><span class="type-annotation">: axi_req_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.unsupported_req" class="impl"><code class="in-band"><a href="#signal.unsupported_req">unsupported_req</a><span class="type-annotation">: axi_req_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.act_resp" class="impl"><code class="in-band"><a href="#signal.act_resp">act_resp</a><span class="type-annotation">: axi_resp_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.unsupported_resp" class="impl"><code class="in-band"><a href="#signal.unsupported_resp">unsupported_resp</a><span class="type-annotation">: axi_resp_t</span></code></h3><div class="docblock">
+</div></section>
+</body>
+</html>
diff --git a/master/module.axi_burst_unwrap_ax_chan.html b/master/module.axi_burst_unwrap_ax_chan.html
@@ -0,0 +1,45 @@
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.219263681 +00:00 -->
+
+<html>
+<link rel="stylesheet" type="text/css" href="static/rustdoc.css">
+<link rel="stylesheet" type="text/css" href="static/light.css">
+<link rel="stylesheet" type="text/css" href="static/svdoc.css">
+<body>
+<section id="main" class="content"><h1 class="fqn">Module <a class="module">axi_burst_unwrap_ax_chan</a></h1>
+<div class="docblock">
+<p>Internal module of <a href="module.axi_burst_splitter"><code>axi_burst_splitter</code></a> to control Ax channels.</p>
+<p>Store burst lengths in counters, which are associated to AXI IDs through ID queues (to allow</p>
+<p>reordering of responses w.r.t. requests).</p>
+</div>
+<h2 id="parameters" class="section-header"><a href="#parameters">Parameters</a></h2>
+<h3 id="parameter.AwChan" class="impl"><code class="in-band"><a href="#parameter.AwChan">AwChan</a><span class="type-annotation">: bit</span></code></h3><div class="docblock">
+</div><h3 id="parameter.chan_t" class="impl"><code class="in-band"><a href="#parameter.chan_t">chan_t</a><span class="type-annotation">: type</span></code></h3><div class="docblock">
+</div><h3 id="parameter.AddrWidth" class="impl"><code class="in-band"><a href="#parameter.AddrWidth">AddrWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.IdWidth" class="impl"><code class="in-band"><a href="#parameter.IdWidth">IdWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.MaxTxns" class="impl"><code class="in-band"><a href="#parameter.MaxTxns">MaxTxns</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+</div><h3 id="parameter.id_t" class="impl"><code class="in-band"><a href="#parameter.id_t">id_t</a><span class="type-annotation">: type</span></code></h3><div class="docblock">
+</div><h2 id="ports" class="section-header"><a href="#ports">Ports</a></h2>
+<h3 id="port.clk_i" class="impl"><code class="in-band"><a href="#port.clk_i">clk_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.rst_ni" class="impl"><code class="in-band"><a href="#port.rst_ni">rst_ni</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.ax_i" class="impl"><code class="in-band"><a href="#port.ax_i">ax_i</a><span class="type-annotation">: input  chan_t</span></code></h3><div class="docblock">
+</div><h3 id="port.ax_valid_i" class="impl"><code class="in-band"><a href="#port.ax_valid_i">ax_valid_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.ax_ready_o" class="impl"><code class="in-band"><a href="#port.ax_ready_o">ax_ready_o</a><span class="type-annotation">: output logic</span></code></h3><div class="docblock">
+</div><h3 id="port.ax_o" class="impl"><code class="in-band"><a href="#port.ax_o">ax_o</a><span class="type-annotation">: output chan_t</span></code></h3><div class="docblock">
+</div><h3 id="port.ax_valid_o" class="impl"><code class="in-band"><a href="#port.ax_valid_o">ax_valid_o</a><span class="type-annotation">: output logic</span></code></h3><div class="docblock">
+</div><h3 id="port.ax_ready_i" class="impl"><code class="in-band"><a href="#port.ax_ready_i">ax_ready_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_id_i" class="impl"><code class="in-band"><a href="#port.cnt_id_i">cnt_id_i</a><span class="type-annotation">: input  id_t</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_len_o" class="impl"><code class="in-band"><a href="#port.cnt_len_o">cnt_len_o</a><span class="type-annotation">: output axi_pkg::len_t [1:0]</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_set_err_i" class="impl"><code class="in-band"><a href="#port.cnt_set_err_i">cnt_set_err_i</a><span class="type-annotation">: input  logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_err_o" class="impl"><code class="in-band"><a href="#port.cnt_err_o">cnt_err_o</a><span class="type-annotation">: output logic</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_dec_i" class="impl"><code class="in-band"><a href="#port.cnt_dec_i">cnt_dec_i</a><span class="type-annotation">: input  logic          [1:0]</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_req_i" class="impl"><code class="in-band"><a href="#port.cnt_req_i">cnt_req_i</a><span class="type-annotation">: input  logic          [1:0]</span></code></h3><div class="docblock">
+</div><h3 id="port.cnt_gnt_o" class="impl"><code class="in-band"><a href="#port.cnt_gnt_o">cnt_gnt_o</a><span class="type-annotation">: output logic          [1:0]</span></code></h3><div class="docblock">
+</div><h2 id="types" class="section-header"><a href="#types">Types<a></h2>
+<table>
+<tr><td><a class="type" href="type.cnt_id_t.html">cnt_id_t</a></td><td></td></tr></table>
+<h2 id="signals" class="section-header"><a href="#signals">Signals</a></h2>
+<h3 id="signal.ax_d" class="impl"><code class="in-band"><a href="#signal.ax_d">ax_d</a><span class="type-annotation">: chan_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.ax_q" class="impl"><code class="in-band"><a href="#signal.ax_q">ax_q</a><span class="type-annotation">: chan_t</span></code></h3><div class="docblock">
+</div></section>
+</body>
+</html>
diff --git a/master/module.axi_bus_compare.html b/master/module.axi_bus_compare.html
@@ -1,4 +1,4 @@
-<!-- Compiled by morty-0.9.0 / 2024-12-10 20:56:51.898852223 +00:00 -->
+<!-- Compiled by morty-0.9.0 / 2024-12-18 13:41:37.220276845 +00:00 -->
 
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