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diff --git a/master/module.axi_id_serialize.html b/master/module.axi_id_serialize.html
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@@ -19,6 +19,9 @@
 <h2 id="parameters" class="section-header"><a href="#parameters">Parameters</a></h2>
 <h3 id="parameter.AxiSlvPortIdWidth" class="impl"><code class="in-band"><a href="#parameter.AxiSlvPortIdWidth">AxiSlvPortIdWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
 <p>ID width of the AXI4+ATOP slave port</p>
+</div><h3 id="parameter.AxiSlvPortMaxTxns" class="impl"><code class="in-band"><a href="#parameter.AxiSlvPortMaxTxns">AxiSlvPortMaxTxns</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+<p>Maximum number of transactions that can be in flight at the slave port.  Reads and writes are</p>
+<p>counted separately (except for ATOPs, which count as both read and write).</p>
 </div><h3 id="parameter.AxiMstPortIdWidth" class="impl"><code class="in-band"><a href="#parameter.AxiMstPortIdWidth">AxiMstPortIdWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
 <p>ID width of the AXI4+ATOP master port</p>
 </div><h3 id="parameter.AxiMstPortMaxUniqIds" class="impl"><code class="in-band"><a href="#parameter.AxiMstPortMaxUniqIds">AxiMstPortMaxUniqIds</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
@@ -29,8 +32,12 @@ <h3 id="parameter.AxiSlvPortIdWidth" class="impl"><code class="in-band"><a href=
 <p>Maximum number of in-flight transactions with the same ID at the master port.</p>
 </div><h3 id="parameter.AxiAddrWidth" class="impl"><code class="in-band"><a href="#parameter.AxiAddrWidth">AxiAddrWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
 <p>Address width of both AXI4+ATOP ports</p>
+</div><h3 id="parameter.AxiDataWidth" class="impl"><code class="in-band"><a href="#parameter.AxiDataWidth">AxiDataWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+<p>Data width of both AXI4+ATOP ports</p>
 </div><h3 id="parameter.AxiUserWidth" class="impl"><code class="in-band"><a href="#parameter.AxiUserWidth">AxiUserWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
 <p>User width of both AXI4+ATOP ports</p>
+</div><h3 id="parameter.AtopSupport" class="impl"><code class="in-band"><a href="#parameter.AtopSupport">AtopSupport</a><span class="type-annotation">: bit</span></code></h3><div class="docblock">
+<p>Enable support for AXI4+ATOP atomics</p>
 </div><h3 id="parameter.slv_req_t" class="impl"><code class="in-band"><a href="#parameter.slv_req_t">slv_req_t</a><span class="type-annotation">: type</span></code></h3><div class="docblock">
 <p>Request struct type of the AXI4+ATOP slave port</p>
 </div><h3 id="parameter.slv_resp_t" class="impl"><code class="in-band"><a href="#parameter.slv_resp_t">slv_resp_t</a><span class="type-annotation">: type</span></code></h3><div class="docblock">
@@ -49,13 +56,10 @@ <h3 id="parameter.AxiSlvPortIdWidth" class="impl"><code class="in-band"><a href=
 <p>Number of Entries in the explicit ID map (default: None)</p>
 </div><h3 id="parameter.IdMap" class="impl"><code class="in-band"><a href="#parameter.IdMap">IdMap</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
 <p>Explicit ID map; index [0] in each entry is the input ID to match, index [1] the output ID.</p>
-</div><h3 id="parameter.SpillAx" class="impl"><code class="in-band"><a href="#parameter.SpillAx">SpillAx</a><span class="type-annotation">: bit</span></code></h3><div class="docblock">
-<p>Spill AR and AW</p>
-</div><h3 id="parameter.AxiSlvPortMaxTxns" class="impl"><code class="in-band"><a href="#parameter.AxiSlvPortMaxTxns">AxiSlvPortMaxTxns</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
-</div><h3 id="parameter.AxiDataWidth" class="impl"><code class="in-band"><a href="#parameter.AxiDataWidth">AxiDataWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
-</div><h3 id="parameter.AtopSupport" class="impl"><code class="in-band"><a href="#parameter.AtopSupport">AtopSupport</a><span class="type-annotation">: bit</span></code></h3><div class="docblock">
 </div><h3 id="parameter.SelectWidth" class="impl"><code class="in-band"><a href="#parameter.SelectWidth">SelectWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
 <p>Number of bits of the slave port ID that determine the mapping to the master port ID</p>
+</div><h3 id="parameter.MuxIdWidth" class="impl"><code class="in-band"><a href="#parameter.MuxIdWidth">MuxIdWidth</a><span class="type-annotation">: int unsigned</span></code></h3><div class="docblock">
+<p>ID width after the multiplexer</p>
 </div><h3 id="parameter.SlvIdMap" class="impl"><code class="in-band"><a href="#parameter.SlvIdMap">SlvIdMap</a><span class="type-annotation">: slv_id_map_t</span></code></h3><div class="docblock">
 <p>Input-to-output ID map used</p>
 </div><h2 id="ports" class="section-header"><a href="#ports">Ports</a></h2>
@@ -74,21 +78,42 @@ <h3 id="port.clk_i" class="impl"><code class="in-band"><a href="#port.clk_i">clk
 </div><h2 id="types" class="section-header"><a href="#types">Types<a></h2>
 <table>
 <tr><td><a class="type" href="type.select_t.html">select_t</a></td><td><p>Slice of slave port IDs that determines the master port ID</p>
+</td></tr><tr><td><a class="type" href="type.ser_id_t.html">ser_id_t</a></td><td><p>ID after serializer (i.e., with a constant value of zero)</p>
+</td></tr><tr><td><a class="type" href="type.mux_id_t.html">mux_id_t</a></td><td><p>ID after the multiplexer</p>
+</td></tr><tr><td><a class="type" href="type.slv_id_t.html">slv_id_t</a></td><td><p>ID at the slave port</p>
 </td></tr><tr><td><a class="type" href="type.mst_id_t.html">mst_id_t</a></td><td><p>ID at the master port</p>
 </td></tr><tr><td><a class="type" href="type.addr_t.html">addr_t</a></td><td><p>Address in any AXI channel</p>
+</td></tr><tr><td><a class="type" href="type.data_t.html">data_t</a></td><td><p>Data in any AXI channel</p>
+</td></tr><tr><td><a class="type" href="type.strb_t.html">strb_t</a></td><td><p>Strobe in any AXI channel</p>
 </td></tr><tr><td><a class="type" href="type.user_t.html">user_t</a></td><td><p>User signal in any AXI channel</p>
+</td></tr><tr><td><a class="type" href="type.w_t.html">w_t</a></td><td><p>W channel at any interface</p>
+</td></tr><tr><td><a class="type" href="type.slv_aw_t.html">slv_aw_t</a></td><td><p>AW channel at slave port</p>
+</td></tr><tr><td><a class="type" href="type.slv_b_t.html">slv_b_t</a></td><td><p>B channel at slave port</p>
+</td></tr><tr><td><a class="type" href="type.slv_ar_t.html">slv_ar_t</a></td><td><p>AR channel at slave port</p>
+</td></tr><tr><td><a class="type" href="type.slv_r_t.html">slv_r_t</a></td><td><p>R channel at slave port</p>
+</td></tr><tr><td><a class="type" href="type.ser_aw_t.html">ser_aw_t</a></td><td><p>AW channel after serializer</p>
+</td></tr><tr><td><a class="type" href="type.ser_b_t.html">ser_b_t</a></td><td><p>B channel after serializer</p>
+</td></tr><tr><td><a class="type" href="type.ser_ar_t.html">ser_ar_t</a></td><td><p>AR channel after serializer</p>
+</td></tr><tr><td><a class="type" href="type.ser_r_t.html">ser_r_t</a></td><td><p>R channel after serializer</p>
+</td></tr><tr><td><a class="type" href="type.ser_req_t.html">ser_req_t</a></td><td><p>AXI Requests from serializer</p>
+</td></tr><tr><td><a class="type" href="type.ser_resp_t.html">ser_resp_t</a></td><td><p>AXI responses to serializer</p>
+</td></tr><tr><td><a class="type" href="type.mux_aw_t.html">mux_aw_t</a></td><td><p>AW channel after the multiplexer</p>
+</td></tr><tr><td><a class="type" href="type.mux_b_t.html">mux_b_t</a></td><td><p>B channel after the multiplexer</p>
+</td></tr><tr><td><a class="type" href="type.mux_ar_t.html">mux_ar_t</a></td><td><p>AR channel after the multiplexer</p>
+</td></tr><tr><td><a class="type" href="type.mux_r_t.html">mux_r_t</a></td><td><p>R channel after the multiplexer</p>
+</td></tr><tr><td><a class="type" href="type.mux_req_t.html">mux_req_t</a></td><td><p>AXI requests from the multiplexer</p>
+</td></tr><tr><td><a class="type" href="type.mux_resp_t.html">mux_resp_t</a></td><td><p>AXI responses to the multiplexer</p>
 </td></tr><tr><td><a class="type" href="type.mst_aw_t.html">mst_aw_t</a></td><td><p>AW channel at master port</p>
+</td></tr><tr><td><a class="type" href="type.mst_b_t.html">mst_b_t</a></td><td><p>B channel at master port</p>
 </td></tr><tr><td><a class="type" href="type.mst_ar_t.html">mst_ar_t</a></td><td><p>AR channel at master port</p>
+</td></tr><tr><td><a class="type" href="type.mst_r_t.html">mst_r_t</a></td><td><p>R channel at master port</p>
 </td></tr><tr><td><a class="type" href="type.slv_id_map_t.html">slv_id_map_t</a></td><td><p>Type for slave ID map</p>
 </td></tr></table>
 <h2 id="signals" class="section-header"><a href="#signals">Signals</a></h2>
 <h3 id="signal.slv_aw_select" class="impl"><code class="in-band"><a href="#signal.slv_aw_select">slv_aw_select</a><span class="type-annotation">: select_t</span></code></h3><div class="docblock">
 </div><h3 id="signal.slv_ar_select" class="impl"><code class="in-band"><a href="#signal.slv_ar_select">slv_ar_select</a><span class="type-annotation">: select_t</span></code></h3><div class="docblock">
-</div><h3 id="signal.slv_b_select" class="impl"><code class="in-band"><a href="#signal.slv_b_select">slv_b_select</a><span class="type-annotation">: select_t</span></code></h3><div class="docblock">
-</div><h3 id="signal.slv_r_select" class="impl"><code class="in-band"><a href="#signal.slv_r_select">slv_r_select</a><span class="type-annotation">: select_t</span></code></h3><div class="docblock">
-</div><h3 id="signal.mst_aw_select" class="impl"><code class="in-band"><a href="#signal.mst_aw_select">mst_aw_select</a><span class="type-annotation">: select_t</span></code></h3><div class="docblock">
-</div><h3 id="signal.mst_ar_select" class="impl"><code class="in-band"><a href="#signal.mst_ar_select">mst_ar_select</a><span class="type-annotation">: select_t</span></code></h3><div class="docblock">
-</div><h3 id="signal.mst_req" class="impl"><code class="in-band"><a href="#signal.mst_req">mst_req</a><span class="type-annotation">: mst_req_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.axi_mux_req" class="impl"><code class="in-band"><a href="#signal.axi_mux_req">axi_mux_req</a><span class="type-annotation">: mux_req_t</span></code></h3><div class="docblock">
+</div><h3 id="signal.axi_mux_resp" class="impl"><code class="in-band"><a href="#signal.axi_mux_resp">axi_mux_resp</a><span class="type-annotation">: mux_resp_t</span></code></h3><div class="docblock">
 </div></section>
 </body>
 </html>