fix(ssa): Use post order when mapping instructions in loop invariant pass #7140
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Description
Problem*
Resolves #7128
Summary*
Ended up being a small fix as it was a silly oversight for how we should be mapping instructions. I switched away from using a BTreeSet of blocks (the return value from
reachable_blocks()
) to using the reverse post order when mapping functions.Mapping instructions by the blocks consecutive ordering is incorrect as we may have a situation like such:
We want to map the instructions from
b3
first, not b1 and b2. In the erroneous way we are mapping on master we could potentially be keeping the sameload v2
inb1
whilev2 = allocate
is updated to a new value. The panics from the missingelse
block in the issue were occurring due to this same bug.I noticed this as the cause of the bug when printing the SSA would get rid of all the bugs listed in the issue. This was due to the normalization pass which would make the reverse post order of the blocks line up with their consecutive numerical ordering.
Additional Context
This ended up being fixed inadvertently by the preprocessing PR. The last failing nightly was
nightly-2025-01-20
. I found the fix on the failing nightly and brought it over to master even though the test is technically passing on master already. The bug most likely did not come up previously due to mem2reg successfully removing references which may be shared across blocks and the preprocess PR further helped clear out these references which may be in numerically smaller children blocks.I wanted to add a minor unit test to make sure we are mapping in the correct block order but this would require some extra changes to the SSA parser (putting a flag on ID normalization would not be enough as the parser also inserts at fresh IDs).
Perhaps we should add some extra safety checks or comments for using
reachable_blocks
.Documentation*
Check one:
PR Checklist*
cargo fmt
on default settings.