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Pull requests: llvm/circt

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Pull requests list

Dedup: hash modules back->front
#7820 opened Nov 15, 2024 by rwy7 • Draft
[hlstool] Add option to use the DC lowering flow Handshake
#7819 opened Nov 14, 2024 by teqdruid Loading…
1
[FIRRTL] Accept list of parameters for formal construct FIRRTL Involving the `firrtl` dialect
#7813 opened Nov 14, 2024 by fabianschuiki Loading…
4
[Handshake] Adding func instance op for integration Handshake
#7812 opened Nov 13, 2024 by teqdruid Loading…
4
[ImportVerilog] Bump slang
#7792 opened Nov 10, 2024 by hovind • Draft
18
[CAPI][Python][Arc, HW] Register Arc and HW passes
#7790 opened Nov 9, 2024 by yassinz Loading…
2
[ImportVerilog] add stream concat operation Moore
#7784 opened Nov 8, 2024 by chenbo-again Loading…
13
[FIRRTL] infer more return types in asm format FIRRTL Involving the `firrtl` dialect
#7781 opened Nov 7, 2024 by youngar • Draft
2
[Draft] [OpLib] Create a Dialect for Representing Operator Libraries
#7771 opened Nov 4, 2024 by andrewb1999 • Draft
1
[Calyx] Binary Floating Point MulF Operator Calyx The Calyx dialect
#7769 opened Nov 3, 2024 by jiahanxie353 Loading…
24
Use getDiscardableAttr to access discardable attributes
#7761 opened Nov 1, 2024 by rwy7 Loading…
[FIRRTL] Add a new FIRRTL annotation to specify type lowering behavior of module body
#7751 opened Oct 30, 2024 by uenoku Loading…
2
RFC: [AIG] Add an AIG dialect and circt-synth
#7717 opened Oct 20, 2024 by uenoku • Draft
95
[SCFToCalyx] If op with sequential condition Calyx The Calyx dialect
#7687 opened Oct 9, 2024 by jiahanxie353 Loading…
20
[RFC][Sim] Add triggered simulation procedures
#7676 opened Oct 8, 2024 by fzi-hielscher Loading…
4
[SCFToCalyx] Memory banking for Calyx Calyx The Calyx dialect
#7671 opened Oct 6, 2024 by jiahanxie353 Loading…
5
SCF IndexSwitch to nested If-Else
#7670 opened Oct 6, 2024 by jiahanxie353 Loading…
13
[FIRRTL][CAPI] Add documentation
#7668 opened Oct 5, 2024 by SpriteOvO Loading…
2
[HWToSMT] ArrayCreateOp and ArrayGetOp support
#7666 opened Oct 4, 2024 by maerhart Loading…
1
5
[Not-for-commit] Demonstrate Yosys integration
#7663 opened Oct 4, 2024 by uenoku • Draft
[Seq] Add cast operation to immutable type
#7638 opened Sep 26, 2024 by uenoku Loading…
12
[Seq] Add a pass to implement firreg randomization
#7606 opened Sep 18, 2024 by uenoku • Draft
[Arc][Vectorization]: Add vector splitter
#7560 opened Aug 30, 2024 by elhewaty • Draft
2
[Arc] Implement memory initializers Arc Involving the `arc` dialect
#7559 opened Aug 28, 2024 by fzi-hielscher • Draft
17
[FIRRTL] Verify enabled layers of module, extmodule.
#7557 opened Aug 26, 2024 by dtzSiFive Loading…
4
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