fixup! aarch64: NULL initialize dataAddr field for 0 size arrays

eclipse-openj9 · Jan 3, 2025 · 519bedd · 519bedd
1 parent 9c83ef2
commit 519bedd
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/runtime/compiler/aarch64/codegen/J9TreeEvaluator.cpp b/runtime/compiler/aarch64/codegen/J9TreeEvaluator.cpp
@@ -3512,7 +3512,7 @@ J9::ARM64::TreeEvaluator::VMnewEvaluator(TR::Node *node, TR::CodeGenerator *cg)
 
             // Clear firstDataElementReg reg if dealing with 0 size arrays
             generateCompareImmInstruction(cg, node, lengthReg, 0, false);
-            generateCondTrg1Src2Instruction(cg(), TR::InstOpCode::cselx, node, firstDataElementReg, zeroReg, firstDataElementReg, TR::CC_EQ);
+            generateCondTrg1Src2Instruction(cg, TR::InstOpCode::cselx, node, firstDataElementReg, zeroReg, firstDataElementReg, TR::CC_EQ);
             }
          else if (!isVariableLength && node->getFirstChild()->getOpCode().isLoadConst() && node->getFirstChild()->getInt() == 0)
             {
@@ -3543,11 +3543,11 @@ J9::ARM64::TreeEvaluator::VMnewEvaluator(TR::Node *node, TR::CodeGenerator *cg)
             dataAddrSlotMR = TR::MemoryReference::createWithDisplacement(cg, resultReg, fej9->getOffsetOfContiguousDataAddrField());
             generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addimmx, node, firstDataElementReg, resultReg, TR::Compiler->om.contiguousArrayHeaderSizeInBytes());
 
-            if (isVariableLength && !TR::Compiler->om.compressedOBjectReferences())
+            if (isVariableLength && !TR::Compiler->om.compressObjectReferences())
                {
                // Clear firstDataElementReg reg if dealing with variable length 0 size arrays
                generateCompareImmInstruction(cg, node, lengthReg, 0, false);
-               generateCondTrg1Src2Instruction(cg(), TR::InstOpCode::cselx, node, offsetReg, zeroReg, offsetReg, TR::CC_EQ);
+               generateCondTrg1Src2Instruction(cg, TR::InstOpCode::cselx, node, offsetReg, zeroReg, offsetReg, TR::CC_EQ);
                }
             }
          generateMemSrc1Instruction(cg, TR::InstOpCode::strimmx, node, dataAddrSlotMR, firstDataElementReg);