Basic register mappings for DP83XXX series PHYs. #4
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datdenkikniet
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Apr 11, 2023
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| ["dp83xxx", DP83640, 0x20005CE1], | ||
| ["dp83xxx", DP83848, 0x20005C62], |
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| ["dp83xxx", DP83640, 0x20005CE1], | |
| ["dp83xxx", DP83848, 0x20005C62], | |
| ["dp83640", DP83640, 0x20005CE1], | |
| ["dp83848", DP83848, 0x20005C62], |
| @@ -11,13 +11,15 @@ categories = ["embedded", "no-std", "hardware-support"] | |||
| readme = "README.md" | |||
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| [features] | |||
| default = [ "lan8720a", "lan8742a", "ksz8081r" ] | |||
| default = ["lan8720a", "lan8742a", "ksz8081r", "dp83640", "dp83848"] | |||
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Unless we can test the additions, we should not have these features activated by default. Fine for now, but if we merge without actually ever running the tests we should remember to change this.
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You're right, I think I'll leave this PR here until I fix my board or someone else test these out for us. Thanks for the comments! I'm still new to embedded Rust and this has been an amazing journey for me :)
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I will change the PR to a draft until that happens, then :)
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This is an experimental implementation for DP83XXX series PHYs (DP83848 and DP83640 as I'm aware of), I wasn't able to test these though due to a defect on my dev board, still I think somebody else might be able to help out and test this out as DP83848 is a relatively common PHY.
Another thing that I'm trying to work on is the hardware timestamping feature of the DP83640. This particular PHY implements hardware accelerated PTP timestamping, and it is also configured through MIIM interface. I'm thinking of a separate trait for these kind of use cases as there are other PHYs supporting this feature as well.