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Issue in generating the VHDL for the processor using Processor Generator (ProGe)
#271
opened Aug 29, 2024 by
Jedrek09
There's no LSU compatibled with AlmaIFIntegrator found in almaif.hdb
#258
opened Apr 27, 2024 by
Lixiang9716
Fail in Test the processor generator and the program image generator in oa-selftest
#256
opened Apr 23, 2024 by
SangYukekeaiai
Generating a matrix in tta_stream_v1.in but not able to write the matrix on tta_stream_v1.out
#252
opened Dec 19, 2023 by
Rhrifateee
3.3 Streaming I/O code in the manual- iprintf and while (1) loop issues
#245
opened Oct 5, 2023 by
Rhrifateee
Are there any comparisons between "Synopsys ASIP Designer" and "OpenASIP"?
#231
opened May 10, 2023 by
manili
OperationBehavior not rebuild if source file changes
help wanted
#210
opened Nov 29, 2022 by
nrother
OperationBehaviorProxy::canBeSimulated() swallows Exceptions silently
#207
opened Nov 25, 2022 by
nrother
DDG adds a dep edge due to operation state even though the operations are forced to different FUs
#115
opened Mar 10, 2021 by
pjaaskel
ProGe: generate a default version of the tta0_imem_mau_pkg.vhdl
#114
opened Jan 22, 2021 by
pjaaskel
ProDe: Processor Implementation dialog's plugin parameter edit text box might get hidden by default
#100
opened Oct 16, 2019 by
pjaaskel
[tcecc] C++11 support?
contributions welcome
This is not in CPC's roadmap at the moment, but we are happy to review your pull requests.
#79
opened Mar 21, 2019 by
alekob
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