Zero vector registers before all tests

chipsalliance · Feb 29, 2024 · 3004022 · 3004022
1 parent f8346b6
commit 3004022
Showing 1 changed file with 7 additions and 0 deletions.
diff --git a/generator/insn.go b/generator/insn.go
@@ -451,6 +451,13 @@ func (c *combination) initialize() string {
 	str := fmt.Sprintf(`
 # Generating tests for VL: %d, LMUL: %s, SEW: %s, Mask: %v
 
+# Zero all vector registers
+vsetvli t0, x0, e8, m8, ta, ma
+vmv.v.i v0, 0x0
+vmv.v.i v8, 0x0
+vmv.v.i v16, 0x0
+vmv.v.i v24, 0x0
+
 # Initialize vxrm CSR
 csrwi vxrm, %d # %s