RC v1.4.12 (#474)

* Added supported versions for BJS AMI's (#589)

* Added release notes

* Added re:Invent 19 workshop link

README.md

@@ -98,6 +98,9 @@ Before you start your first AWS FPGA design, we recommend that you go through on
 
 ### In-depth training and resources
 Once you have completed your hello world examples, we recommend diving deeper into a training workshop or application notes
+ * Software-defined [re:Invent 2019 Workshop](https://github.com/Xilinx/SDAccel-AWS-F1-Developer-Labs).
+    * Lab modules will take you through accelerating compute intensive functions like Inverse Discrete Cosine Transform, Bloom Filter, 2D video convolution, etc.
+    * You will learn how to identify functions to accelerate and use profiling on example applications use that information to optimize your data movement between the HOST and FPGA.
  * Software-defined [re:Invent 2018 Workshop](https://github.com/awslabs/aws-fpga-app-notes/blob/master/reInvent18_Developer_Workshop/README.md) demonstrates a 2D Filter acceleration and how to debug and optimize your accelerator.
  * Custom hardware developers need to learn about how the hardware accelerator interfaces to the F1 Shell
   * [Shell Interface](hdk/docs/AWS_Shell_Interface_Specification.md)
@@ -192,7 +195,3 @@ The documentation is located throughout this developer kit, therefore, to help d
   * [Searching code](https://help.github.com/articles/searching-code/) and [advanced search syntax](https://help.github.com/articles/understanding-the-search-syntax/)
   * [Finding files](https://help.github.com/articles/finding-files-on-github/)
   * Simply replace github.com with gitprint.com to generate a printable PDF
-
-
-
-

RELEASE_NOTES.md

@@ -24,6 +24,10 @@
          *    1 DDR controller implemented in the SH (always available)
          *    3 DDR controllers implemented in the CL (configurable number of implemented controllers allowed)
 
+## Release 1.4.12 (See [ERRATA](./ERRATA.md) for unsupported features)
+* Added support for Xilinx tool versions released in the AWS China Marketplace.
+* Updated NICE DCV setup instructions.
+
 ## Release 1.4.11 (See [ERRATA](./ERRATA.md) for unsupported features)
 * FPGA developer kit now supports Xilinx SDx/Vivado 2019.1
     * We recommend developers upgrade to v1.4.11 to benefit from the new features, bug fixes, and optimizations. 

developer_resources/DCV.md

@@ -52,6 +52,7 @@ If you experience issues please refer to the [Official DCV documentation](https:
 1. [Install NICE DCV pre-requisites](https://docs.aws.amazon.com/dcv/latest/adminguide/setting-up-installing-linux-prereq.html)
 
    ```
+   sudo yum -y install kernel-devel
    sudo yum -y groupinstall "GNOME Desktop"
    sudo yum -y install glx-utils
    ```
@@ -83,19 +84,21 @@ If you experience issues please refer to the [Official DCV documentation](https:
    * Disable firewalld to allow all connections
    ```
    sudo systemctl stop firewalld
+   sudo systemctl disable firewalld
    ```
 
    * Open up the firewall only for tcp port 8443
 
    ```
    sudo systemctl start firewalld
+   sudo systemctl enable firewalld
    sudo firewall-cmd --zone=public --add-port=8443/tcp --permanent
    sudo firewall-cmd --reload
    ```
 
 1. Create a virtual session to connect to    
 
-   **NOTE: that you will have to create a new session if you restart your instance.** 
+   **NOTE: You will have to create a new session if you restart your instance.** 
 
    ```
    dcv create-session --type virtual --user centos centos

supported_vivado_versions.txt

@@ -6,5 +6,7 @@ Vivado v2018.2.op (64-bit)
 Vivado v2018.2 (64-bit)
 Vivado v2018.3.op (64-bit)
 Vivado v2018.3 (64-bit)
+Vivado v2018.3_AR72667 (64-bit)
 Vivado v2019.1.op (64-bit)
 Vivado v2019.1 (64-bit)
+Vivado v2019.1_AR72668 (64-bit)