Level-sensitive IRQ emulation support #24
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Signed-off-by: Markku Ahvenjärvi <[email protected]>
Add new virq_set_level() function to transparently emulate level sensitive interrupt semantics. The interrupt will be re-injected as long level remains high and the guest has configured interrupt to be level-sensitive to the distributor. The level is self-clearing for edge triggered interrupts. Signed-off-by: Markku Ahvenjärvi <[email protected]>
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Thanks for the PR. Apologies it took so long to take a look at it. Just pushed to your branch to resolve the conflicts. Will double check the code with @erichchan999 now. |
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Cool, thanks 👍 |
| @@ -45,7 +72,7 @@ bool fault_handle_vgic_maintenance(size_t vcpu_id) | |||
| /* Clear pending */ | |||
| LOG_IRQ("Maintenance IRQ %d\n", lr_virq.virq); | |||
| set_pending(vgic_get_dist(vgic.registers), lr_virq.virq, false, vcpu_id); | |||
| virq_ack(vcpu_id, &lr_virq); | |||
| vgic_irq_ack(&vgic, vcpu_id, &lr_virq); | |||
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If the virq being maintained here turns out to be level-sensitive shouldn't we skip over dequeuing the next irq and loading into list registers? Since we are reasserting the interrupt already when its level-sensitive
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Thank you for the comment.
Yes, we could first call ack() callback, and skip the dequeue if irq level is still set.
I can make the changes when I have the time.
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The PR adds another interrupt inject function,
virq_set_level(), which can be used to implement level-sensitive interrupt emulation e.g. for vPCI devices.