Skip to content
View alexforencich's full-sized avatar

Organizations

@LabPy @SEDS-Software @ucsdsysnet @corundum @fpganinja

Block or report alexforencich

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. corundum/corundum corundum/corundum Public

    Open source FPGA-based NIC and platform for in-network compute

    Verilog 1.7k 419

  2. verilog-ethernet verilog-ethernet Public

    Verilog Ethernet components for FPGA implementation

    Verilog 2.3k 706

  3. cocotbext-pcie cocotbext-pcie Public

    PCI express simulation framework for Cocotb

    Python 139 47

  4. verilog-pcie verilog-pcie Public

    Verilog PCI express components

    Verilog 1.1k 302

  5. cocotbext-axi cocotbext-axi Public

    AXI interface modules for Cocotb

    Python 213 70

  6. verilog-axi verilog-axi Public

    Verilog AXI components for FPGA implementation

    Verilog 1.5k 448