update libcpuid

a1ive · Jul 4, 2024 · ffa3dd1 · ffa3dd1
1 parent fcdbef5
commit ffa3dd1
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Showing 19 changed files with 2,574 additions and 221 deletions.
diff --git a/libcpuid/asm-bits.c b/libcpuid/asm-bits.c
@@ -25,6 +25,7 @@
  */
 
 #include "libcpuid.h"
+#include "libcpuid_util.h"
 #include "asm-bits.h"
 
 int cpuid_exists_by_eflags(void)
@@ -135,6 +136,8 @@ void exec_cpuid(uint32_t *regs)
 		:"m"(regs)
 		:"memory", "eax", "edi"
 	);
+#	else
+	UNUSED(regs);
 #	endif /* COMPILER_GCC */
 #else
 #  ifdef COMPILER_MICROSOFT
@@ -167,7 +170,7 @@ void exec_cpuid(uint32_t *regs)
 #  endif /* COMPILER_MICROSOFT */
 #endif
 }
-#endif /* INLINE_ASSEMBLY_SUPPORTED */
+#endif /* INLINE_ASM_SUPPORTED */
 
 #ifdef INLINE_ASM_SUPPORTED
 void cpu_rdtsc(uint64_t* result)
@@ -516,6 +519,8 @@ void busy_sse_loop(int cycles)
 		"	jnz	1b\n"
 		::"a"(cycles)
 	);
+#else
+	UNUSED(cycles);
 #endif
 #else
 #  ifdef COMPILER_MICROSOFT
@@ -829,4 +834,4 @@ void busy_sse_loop(int cycles)
 #  endif /* COMPILER_MICROSOFT */
 #endif /* COMPILER_GCC */
 }
-#endif /* INLINE_ASSEMBLY_SUPPORTED */
+#endif /* INLINE_ASM_SUPPORTED */
diff --git a/libcpuid/asm-bits.h b/libcpuid/asm-bits.h
@@ -51,13 +51,32 @@
 #if !defined(PLATFORM_X86)
 #	define PLATFORM_X86
 #endif
-#elif defined(__ARMEL__)
+#elif defined(__arm__)
 #if !defined(PLATFORM_ARM)
 #	define PLATFORM_ARM
 #endif
 #elif defined(__aarch64__)
-#if !defined(PLATFORM_ARM)
+#if !defined(PLATFORM_AARCH64)
 #	define PLATFORM_AARCH64
+/*
+ * Older assemblers don't recognize newer system register names,
+ * but we can still access them by the Sn_n_Cn_Cn_n syntax.
+ */
+#	define SYS_ID_AA64PFR0_EL1  "S3_0_C0_C4_0"
+#	define SYS_ID_AA64PFR1_EL1  "S3_0_C0_C4_1"
+#	define SYS_ID_AA64PFR2_EL1  "S3_0_C0_C4_2"
+#	define SYS_ID_AA64ZFR0_EL1  "S3_0_C0_C4_4"
+#	define SYS_ID_AA64SMFR0_EL1 "S3_0_C0_C4_5"
+#	define SYS_ID_AA64DFR0_EL1  "S3_0_C0_C5_0"
+#	define SYS_ID_AA64DFR1_EL1  "S3_0_C0_C5_1"
+#	define SYS_ID_AA64ISAR0_EL1 "S3_0_C0_C6_0"
+#	define SYS_ID_AA64ISAR1_EL1 "S3_0_C0_C6_1"
+#	define SYS_ID_AA64ISAR2_EL1 "S3_0_C0_C6_2"
+#	define SYS_ID_AA64MMFR0_EL1 "S3_0_C0_C7_0"
+#	define SYS_ID_AA64MMFR1_EL1 "S3_0_C0_C7_1"
+#	define SYS_ID_AA64MMFR2_EL1 "S3_0_C0_C7_2"
+#	define SYS_ID_AA64MMFR3_EL1 "S3_0_C0_C7_3"
+#	define SYS_ID_AA64MMFR4_EL1 "S3_0_C0_C7_4"
 #endif
 #endif
 
@@ -67,6 +86,16 @@
 #	define INLINE_ASM_SUPPORTED
 #endif
 
+#ifdef INLINE_ASM_SUPPORTED
+#  if defined(COMPILER_GCC) || defined(COMPILER_CLANG)
+#    define cpu_exec_mrs(reg_name, reg_value) __asm __volatile("mrs %0, " reg_name : "=r" (reg_value))
+#  elif defined(COMPILER_MICROSOFT)
+#    define cpu_exec_mrs(reg_name, reg_value) __asm { mrs reg_value, reg_name }
+#  else
+#    error "Unsupported compiler"
+#  endif /* COMPILER */
+#endif /* INLINE_ASM_SUPPORTED */
+
 int cpuid_exists_by_eflags(void);
 void exec_cpuid(uint32_t *regs);
 void busy_sse_loop(int cycles);