fix VPB/VNB pins not being found

VLSIDA · Nov 1, 2023 · 788d7e5 · 788d7e5
1 parent 3113798
commit 788d7e5
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Showing 2 changed files with 7 additions and 7 deletions.
diff --git a/Makefile b/Makefile
@@ -13,7 +13,7 @@ SRAM_LIB_GIT_REPO ?= https://github.com/vlsida/sky130_fd_bd_sram.git
 # Use this for development
 #SRAM_LIB_GIT_REPO ?= [email protected]:VLSIDA/sky130_fd_bd_sram.git
 #SRAM_LIB_GIT_REPO ?= https://github.com/google/skywater-pdk-libs-sky130_fd_bd_sram.git
-SRAM_LIB_GIT_COMMIT ?= 9fcf3a78398037583b6d6c1ebac71957343c4bd8
+SRAM_LIB_GIT_COMMIT ?= dd64256961317205343a3fd446908b42bafba388
 
 # Open PDKs
 OPEN_PDKS_DIR ?= $(PDK_ROOT)/open_pdks

diff --git a/technology/sky130/tech/tech.py b/technology/sky130/tech/tech.py
@@ -114,15 +114,15 @@
 cell_properties.bitcell_2port.gnd_layer = "m2"
 cell_properties.bitcell_2port.gnd_dir = "H"
 
-cell_properties.col_cap_1port_bitcell = d.cell(['bl', 'vdd', 'gnd', 'br', 'gate', 'vpb', 'vnb'],
-                                             ['INPUT', 'POWER', 'GROUND', 'INPUT', 'INPUT', 'BIAS', 'BIAS'],
+cell_properties.col_cap_1port_bitcell = d.cell(['bl', 'br', 'vdd', 'gnd', 'vpb', 'vnb', 'gate'],
+                                             ['INPUT', 'INPUT','POWER', 'GROUND',  'BIAS', 'BIAS', 'INPUT'],
                                              {'bl': 'bl',
                                               'br': 'br',
                                               'vdd': 'vdd',
                                               'gnd': 'gnd',
-                                              'gate': 'gate',
                                               'vnb': 'vnb',
-                                              'vpb': 'vpb'})
+                                              'vpb': 'vpb',
+                                              'gate': 'gate'})
 cell_properties.col_cap_1port_bitcell.boundary_layer = "mem"
 
 cell_properties.col_cap_1port_strap_power = d.cell(['vdd', 'vpb', 'vnb'],
@@ -415,8 +415,8 @@
 # pin_read purposes
 special_purposes = {layer["nwell"][0]: [layer["nwell"][1], 5, 59, 16]}
 #layer_override = {"VNB\x00": ["pwell",122]}
-layer_override = {"VNB": layer["pwellp"]}
-layer_override_name = {"VNB": "pwellp"}
+layer_override = {"vnb": layer["pwellp"], "VNB": layer["pwellp"]}
+layer_override_name = {"vnb": "pwellp", "VNB": "pwellp"}
 layer_override_purpose = {122: (64, 59)}
 # Layer names for external PDKs
 layer_names = {}