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+
+      <a href="https://dev.to/targeted/learning-fpga-programming-key-points-for-a-software-developer-18bf" class="title is-size-6">Learning FPGA programming, key points for a software developer</a>
+
+    <span>@eine</span>
+  </div>
+  <div class="is-7">
+    <a
+      title="Go to GitHub Issue"
+      href="https://github.com/VHDL/news/issues/10">
+      #10
+      <i class="mdi mdi-thumb-up"></i> 1
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+<li><a href="https://dev.to/targeted/learning-fpga-programming-key-points-for-a-software-developer-part-2-registered-logic-j3k">Learning FPGA programming, key points for a software developer (part 2, registered logic)</a></li>
+<li><a href="https://dev.to/targeted/learning-fpga-programming-key-points-for-a-software-developer-part-3-code-patterns-and-inferred-behavior-1j28">Learning FPGA programming, key points for a software developer (part 3, code patterns and inferred behavior) </a></li>
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+      <a href="http://pepijndevos.nl/2019/08/15/open-source-formal-verification-in-vhdl.html" class="title is-size-6">Open Source Formal Verification in VHDL</a>
+
+    <span>@Ahmad-Zaklouta</span>
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