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Allow writing CBO bits in xenvcfg
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This was accidentally missed from the CBO implementation.
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Timmmm committed Dec 6, 2024
1 parent a78ab63 commit 6390c7f
Showing 1 changed file with 14 additions and 6 deletions.
20 changes: 14 additions & 6 deletions model/riscv_sys_regs.sail
Original file line number Diff line number Diff line change
Expand Up @@ -836,16 +836,24 @@ bitfield SEnvcfg : xlenbits = {

function legalize_menvcfg(o : MEnvcfg, v : bits(64)) -> MEnvcfg = {
let v = Mk_MEnvcfg(v);
let o = [o with FIOM = if sys_enable_writable_fiom() then v[FIOM] else 0b0];
// Other extensions are not implemented yet so all other fields are read only zero.
o
[o with
FIOM = if sys_enable_writable_fiom() then v[FIOM] else 0b0,
CBZE = v[CBZE],
CBCFE = v[CBCFE],
CBIE = if v[CBIE] != 0b10 then v[CBIE] else 0b00,
// Other extensions are not implemented yet so all other fields are read only zero.
]
}

function legalize_senvcfg(o : SEnvcfg, v : xlenbits) -> SEnvcfg = {
let v = Mk_SEnvcfg(v);
let o = [o with FIOM = if sys_enable_writable_fiom() then v[FIOM] else 0b0];
// Other extensions are not implemented yet so all other fields are read only zero.
o
[o with
FIOM = if sys_enable_writable_fiom() then v[FIOM] else 0b0,
CBZE = v[CBZE],
CBCFE = v[CBCFE],
CBIE = if v[CBIE] != 0b10 then v[CBIE] else 0b00,
// Other extensions are not implemented yet so all other fields are read only zero.
]
}

register menvcfg : MEnvcfg
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