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NaxRiscv update for compatibility with naxriscv branches of rvls/risc-isa-sim #403

NaxRiscv update for compatibility with naxriscv branches of rvls/risc-isa-sim

NaxRiscv update for compatibility with naxriscv branches of rvls/risc-isa-sim #403

Triggered via pull request December 2, 2024 15:35
Status Failure
Total duration 5m 4s
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scala.yml

on: pull_request
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1 error and 1 warning
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Process completed with exit code 128.
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