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Merge pull request #851 from spycat88/amlogic-6.12
linux: bump amlogic to 6.12
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packages/kernel/drivers/RTL8851BU/patches/001-fix-building-on-6-12.patch
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,21 @@ | ||
--- a/Makefile | ||
+++ b/Makefile | ||
@@ -14,6 +14,7 @@ | ||
#EXTRA_CFLAGS += -Wno-unused-function | ||
EXTRA_CFLAGS += -Wno-unused | ||
#EXTRA_CFLAGS += -Wno-uninitialized | ||
+EXTRA_CFLAGS += -w | ||
|
||
############ ANDROID COMMON KERNEL ############ | ||
# clang | ||
--- a/os_dep/linux/ioctl_cfg80211.h | ||
+++ b/os_dep/linux/ioctl_cfg80211.h | ||
@@ -90,7 +90,7 @@ | ||
|
||
#if defined(CONFIG_DFS_MASTER) && (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 17, 0)) | ||
#ifndef CONFIG_RTW_CFG80211_CAC_EVENT | ||
-#define CONFIG_RTW_CFG80211_CAC_EVENT 1 | ||
+#define CONFIG_RTW_CFG80211_CAC_EVENT 0 | ||
#endif | ||
#else | ||
#ifdef CONFIG_RTW_CFG80211_CAC_EVENT |
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31
packages/kernel/drivers/mali-bifrost/patches/001-fix-building-on-linux-6-11.patch
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packages/kernel/drivers/mali-bifrost/patches/001-fix-building-on-linux-6-12.patch
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,72 @@ | ||
--- a/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c | ||
+++ b/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c | ||
@@ -5748,7 +5748,7 @@ | ||
struct kbase_device *kbdev = to_kbase_device(&pdev->dev); | ||
|
||
if (!kbdev) | ||
- return -ENODEV; | ||
+ return; | ||
|
||
kbase_device_term(kbdev); | ||
dev_set_drvdata(kbdev->dev, NULL); | ||
--- a/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c | ||
+++ b/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c | ||
@@ -5743,7 +5743,7 @@ | ||
put_device(kbdev->dev); | ||
} | ||
|
||
-static int kbase_platform_device_remove(struct platform_device *pdev) | ||
+static void kbase_platform_device_remove(struct platform_device *pdev) | ||
{ | ||
struct kbase_device *kbdev = to_kbase_device(&pdev->dev); | ||
|
||
@@ -5753,8 +5753,6 @@ | ||
kbase_device_term(kbdev); | ||
dev_set_drvdata(kbdev->dev, NULL); | ||
kbase_device_free(kbdev); | ||
- | ||
- return 0; | ||
} | ||
|
||
void kbase_backend_devfreq_term(struct kbase_device *kbdev) | ||
--- a/product/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.c | ||
+++ b/product/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.c | ||
@@ -305,12 +305,13 @@ | ||
if (err) | ||
goto dma_set_mask_failed; | ||
|
||
- | ||
+#if 0 | ||
/* There is no limit for Mali, so set to max. */ | ||
if (kbdev->dev->dma_parms) | ||
err = dma_set_max_seg_size(kbdev->dev, UINT_MAX); | ||
if (err) | ||
goto dma_set_mask_failed; | ||
+#endif | ||
|
||
kbdev->nr_hw_address_spaces = (s8)kbdev->gpu_props.num_address_spaces; | ||
|
||
--- a/product/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.c | ||
+++ b/product/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.c | ||
@@ -651,7 +651,9 @@ | ||
|
||
/* The file operations virtual function table */ | ||
static const struct file_operations file_operations = { .owner = THIS_MODULE, | ||
+#if 0 | ||
.llseek = no_llseek, | ||
+#endif | ||
.read = reader_read, | ||
.poll = reader_poll, | ||
.release = reader_release }; | ||
--- a/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c | ||
+++ b/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c | ||
@@ -774,7 +774,9 @@ | ||
} | ||
|
||
filp->private_data = kfile; | ||
+#if 0 | ||
filp->f_mode |= FMODE_UNSIGNED_OFFSET; | ||
+#endif | ||
|
||
return 0; | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,14 +1,14 @@ | ||
From 60f385470dd48a55a4a454da6d6c01f315a9151c Mon Sep 17 00:00:00 2001 | ||
From be40f824e533f0677f0f9e713241b75dc4da29bc Mon Sep 17 00:00:00 2001 | ||
From: spycat88 <[email protected]> | ||
Date: Tue, 23 Jan 2024 23:28:55 +0000 | ||
Subject: [PATCH 01/40] drm: panel: st7701: add odroid-go-ultra panel support | ||
Subject: [PATCH 01/42] drm: panel: st7701: add odroid-go-ultra panel support | ||
|
||
--- | ||
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 162 +++++++++++++++++- | ||
1 file changed, 161 insertions(+), 1 deletion(-) | ||
|
||
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c | ||
index eef03d04e0cd..9cf18fe23498 100644 | ||
index eef03d04e0cd..46696ce5ffd6 100644 | ||
--- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c | ||
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c | ||
@@ -435,6 +435,66 @@ static void kd50t048a_gip_sequence(struct st7701 *st7701) | ||
|
@@ -21,57 +21,57 @@ index eef03d04e0cd..9cf18fe23498 100644 | |
+ * ST7701_SPEC_V1.2 is unable to provide enough information above this | ||
+ * specific command sequence, so grab the same from vendor BSP driver. | ||
+ */ | ||
+ ST7701_DSI(st7701, 0x01); | ||
+ ST7701_WRITE(st7701, 0x01); | ||
+ msleep(5); | ||
+ ST7701_DSI(st7701, 0x11); | ||
+ ST7701_WRITE(st7701, 0x11); | ||
+ msleep(120); | ||
+ | ||
+ ST7701_DSI(st7701, 0xFF, 0x77, 0x01, 0x00, 0x00, 0x10); | ||
+ ST7701_DSI(st7701, 0xC0, 0xE9, 0x03); | ||
+ ST7701_DSI(st7701, 0xC1, 0x11, 0x02); | ||
+ ST7701_DSI(st7701, 0xC2, 0x31, 0x08); | ||
+ ST7701_DSI(st7701, 0xCC, 0x10); | ||
+ ST7701_DSI(st7701, 0xB0, 0x00, 0x0D, 0x14, 0x0D, 0x10, 0x05, 0x02, 0x08, | ||
+ ST7701_WRITE(st7701, 0xFF, 0x77, 0x01, 0x00, 0x00, 0x10); | ||
+ ST7701_WRITE(st7701, 0xC0, 0xE9, 0x03); | ||
+ ST7701_WRITE(st7701, 0xC1, 0x11, 0x02); | ||
+ ST7701_WRITE(st7701, 0xC2, 0x31, 0x08); | ||
+ ST7701_WRITE(st7701, 0xCC, 0x10); | ||
+ ST7701_WRITE(st7701, 0xB0, 0x00, 0x0D, 0x14, 0x0D, 0x10, 0x05, 0x02, 0x08, | ||
+ 0x08, 0x1E, 0x05, 0x13, 0x11, 0xA3, 0x29, 0x18); | ||
+ ST7701_DSI(st7701, 0xB1, 0x00, 0x0C, 0x14, 0x0C, 0x10, 0x05, 0x03, 0x08, | ||
+ ST7701_WRITE(st7701, 0xB1, 0x00, 0x0C, 0x14, 0x0C, 0x10, 0x05, 0x03, 0x08, | ||
+ 0x07, 0x20, 0x05, 0x13, 0x11, 0xA4, 0x29, 0x18); | ||
+ ST7701_DSI(st7701, 0xFF, 0x77, 0x01, 0x00, 0x00, 0x11); | ||
+ ST7701_DSI(st7701, 0xB0, 0x6C); | ||
+ ST7701_DSI(st7701, 0xB1, 0x43); | ||
+ ST7701_DSI(st7701, 0xB2, 0x07); | ||
+ ST7701_DSI(st7701, 0xB3, 0x80); | ||
+ ST7701_DSI(st7701, 0xB5, 0x47); | ||
+ ST7701_DSI(st7701, 0xB7, 0x85); | ||
+ ST7701_DSI(st7701, 0xB8, 0x20); | ||
+ ST7701_DSI(st7701, 0xB9, 0x10); | ||
+ ST7701_DSI(st7701, 0xC1, 0x78); | ||
+ ST7701_DSI(st7701, 0xC3, 0x78); | ||
+ ST7701_DSI(st7701, 0xD0, 0x88); | ||
+ ST7701_WRITE(st7701, 0xFF, 0x77, 0x01, 0x00, 0x00, 0x11); | ||
+ ST7701_WRITE(st7701, 0xB0, 0x6C); | ||
+ ST7701_WRITE(st7701, 0xB1, 0x43); | ||
+ ST7701_WRITE(st7701, 0xB2, 0x07); | ||
+ ST7701_WRITE(st7701, 0xB3, 0x80); | ||
+ ST7701_WRITE(st7701, 0xB5, 0x47); | ||
+ ST7701_WRITE(st7701, 0xB7, 0x85); | ||
+ ST7701_WRITE(st7701, 0xB8, 0x20); | ||
+ ST7701_WRITE(st7701, 0xB9, 0x10); | ||
+ ST7701_WRITE(st7701, 0xC1, 0x78); | ||
+ ST7701_WRITE(st7701, 0xC3, 0x78); | ||
+ ST7701_WRITE(st7701, 0xD0, 0x88); | ||
+ msleep(120); | ||
+ | ||
+ ST7701_DSI(st7701, 0xE0, 0x00, 0x00, 0x02); | ||
+ ST7701_DSI(st7701, 0xE1, 0x08, 0x00, 0x0A, 0x00, 0x07, 0x00, 0x09, | ||
+ ST7701_WRITE(st7701, 0xE0, 0x00, 0x00, 0x02); | ||
+ ST7701_WRITE(st7701, 0xE1, 0x08, 0x00, 0x0A, 0x00, 0x07, 0x00, 0x09, | ||
+ 0x00, 0x00, 0x33, 0x33); | ||
+ ST7701_DSI(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
+ ST7701_WRITE(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | ||
+ ST7701_DSI(st7701, 0xE3, 0x00, 0x00, 0x33, 0x33); | ||
+ ST7701_DSI(st7701, 0xE4, 0x44, 0x44); | ||
+ ST7701_DSI(st7701, 0xE5, 0x0E, 0x60, 0xA0, 0xA0, 0x10, 0x60, 0xA0, | ||
+ ST7701_WRITE(st7701, 0xE3, 0x00, 0x00, 0x33, 0x33); | ||
+ ST7701_WRITE(st7701, 0xE4, 0x44, 0x44); | ||
+ ST7701_WRITE(st7701, 0xE5, 0x0E, 0x60, 0xA0, 0xA0, 0x10, 0x60, 0xA0, | ||
+ 0xA0, 0x0A, 0x60, 0xA0, 0xA0, 0x0C, 0x60, 0xA0, 0xA0); | ||
+ ST7701_DSI(st7701, 0xE6, 0x00, 0x00, 0x33, 0x33); | ||
+ ST7701_DSI(st7701, 0xE7, 0x44, 0x44); | ||
+ ST7701_DSI(st7701, 0xE8, 0x0D, 0x60, 0xA0, 0xA0, 0x0F, 0x60, 0xA0, | ||
+ ST7701_WRITE(st7701, 0xE6, 0x00, 0x00, 0x33, 0x33); | ||
+ ST7701_WRITE(st7701, 0xE7, 0x44, 0x44); | ||
+ ST7701_WRITE(st7701, 0xE8, 0x0D, 0x60, 0xA0, 0xA0, 0x0F, 0x60, 0xA0, | ||
+ 0xA0, 0x09, 0x60, 0xA0, 0xA0, 0x0B, 0x60, 0xA0, 0xA0); | ||
+ ST7701_DSI(st7701, 0xEB, 0x02, 0x01, 0xE4, 0xE4, 0x44, 0x00, 0x40); | ||
+ ST7701_DSI(st7701, 0xEC, 0x02, 0x01); | ||
+ ST7701_DSI(st7701, 0xED, 0xAB, 0x89, 0x76, 0x54, 0x01, 0xFF, 0xFF, | ||
+ ST7701_WRITE(st7701, 0xEB, 0x02, 0x01, 0xE4, 0xE4, 0x44, 0x00, 0x40); | ||
+ ST7701_WRITE(st7701, 0xEC, 0x02, 0x01); | ||
+ ST7701_WRITE(st7701, 0xED, 0xAB, 0x89, 0x76, 0x54, 0x01, 0xFF, 0xFF, | ||
+ 0xFF, 0xFF, 0xFF, 0xFF, 0x10, 0x45, 0x67, 0x98, 0xBA); | ||
+ ST7701_DSI(st7701, 0xFF, 0x77, 0x01, 0x00, 0x00, 0x00); | ||
+ ST7701_DSI(st7701, 0x3A, 0x70); | ||
+ ST7701_DSI(st7701, 0x53, 0xEC); | ||
+ ST7701_DSI(st7701, 0x55, 0xB3); | ||
+ ST7701_DSI(st7701, 0x5E, 0xFF); | ||
+ ST7701_DSI(st7701, 0x29); | ||
+ ST7701_WRITE(st7701, 0xFF, 0x77, 0x01, 0x00, 0x00, 0x00); | ||
+ ST7701_WRITE(st7701, 0x3A, 0x70); | ||
+ ST7701_WRITE(st7701, 0x53, 0xEC); | ||
+ ST7701_WRITE(st7701, 0x55, 0xB3); | ||
+ ST7701_WRITE(st7701, 0x5E, 0xFF); | ||
+ ST7701_WRITE(st7701, 0x29); | ||
+ msleep(50); | ||
+} | ||
+ | ||
|
@@ -124,62 +124,62 @@ index eef03d04e0cd..9cf18fe23498 100644 | |
+ .panel_sleep_delay = 120, | ||
+ | ||
+ .pv_gamma = { | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0xd), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x14), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0xd), | ||
+ | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x10), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x5), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x2), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x8), | ||
+ | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x8), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x1e), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x5), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x13), | ||
+ | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x11), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 2) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x23), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x29), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x18) | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC0_MASK, 0), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0xd), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC8_MASK, 0x14), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC16_MASK, 0xd), | ||
+ | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC24_MASK, 0x10), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC52_MASK, 0x5), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC80_MASK, 0x2), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC108_MASK, 0x8), | ||
+ | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC147_MASK, 0x8), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC175_MASK, 0x1e), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC203_MASK, 0x5), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC231_MASK, 0x13), | ||
+ | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC239_MASK, 0x11), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 2) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC247_MASK, 0x23), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC251_MASK, 0x29), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC255_MASK, 0x18) | ||
+ }, | ||
+ .nv_gamma = { | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0xc), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x14), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0xc), | ||
+ | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x10), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x5), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x3), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x8), | ||
+ | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x7), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x20), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x5), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x13), | ||
+ | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x11), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 2) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x24), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x29), | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x18) | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC0_MASK, 0), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0xc), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC8_MASK, 0x14), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC16_MASK, 0xc), | ||
+ | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC24_MASK, 0x10), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC52_MASK, 0x5), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC80_MASK, 0x3), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC108_MASK, 0x8), | ||
+ | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC147_MASK, 0x7), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC175_MASK, 0x20), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC203_MASK, 0x5), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC231_MASK, 0x13), | ||
+ | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC239_MASK, 0x11), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 2) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC247_MASK, 0x24), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC251_MASK, 0x29), | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | | ||
+ CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC255_MASK, 0x18) | ||
+ }, | ||
+ .nlinv = 1, | ||
+ .vop_uv = 4887500, | ||
|
@@ -209,5 +209,5 @@ index eef03d04e0cd..9cf18fe23498 100644 | |
{ } | ||
}; | ||
-- | ||
2.39.5 | ||
2.34.1 | ||
|
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