Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

feat(fpga): support PCIe XDMA based difftest #453

Merged
merged 41 commits into from
Jan 10, 2025
Merged

feat(fpga): support PCIe XDMA based difftest #453

merged 41 commits into from
Jan 10, 2025

Conversation

xiaokamikami
Copy link
Contributor

@xiaokamikami xiaokamikami commented Aug 29, 2024

When using fpga to carry out difftest, difftest will read out the architecture related information from the dma interface as a host program, and check the register on the PC side.

Before use, the computer needs to install the driver: https://github.com/Xilinx/dma_ip_drivers

By default, single-channel DMA is used to run. When multi-channel DMA is enabled, multi-thread is used to receive data packets. After reorganization and sorting, other processes are the same as single-channel,max size DMA_CHANNELS=4.

usage make fpga-build FPGA=1 DMA_CHANNELS=1, run: sudo ./fpga-host --diff nemu.so -i workload.bin.

The idea of this function comes from the revision of encore. Thanks to the support of Teacher Shi Kan and Xu Shuoxiang for providing the XDMA initialization code (f7f0f8b), and Zhang Shoulin for helping debug the FPGA

Co-authored-by: fengkehan [email protected]
Co-authored-by: xushuoxiang [email protected]
Co-authored-by: zhangshoulin [email protected]

@xiaokamikami xiaokamikami linked an issue Aug 29, 2024 that may be closed by this pull request
@poemonsense
Copy link
Member

Where does the source code come from? Who are the authors?

@changekkk
Copy link

您好,想问一下,目前difftest环境和encore能结合起来吗?我看到encore的流程里在生成snapshot,可以进一步在仿真环境里运行,这里是否可以用difftest来跑?另外,目前fpga上的difftest环境运行时速度跟encore比哪个更快呢?

@wyz-icer
Copy link

这套框架怎么用起来? 需要在FPGA流程里使用吗?

@xiaokamikami
Copy link
Contributor Author

您好,想问一下,目前difftest环境和encore能结合起来吗?我看到encore的流程里在生成snapshot,可以

你好,这套系统就是将类似encore的结构做到difftest环境,这套系统目前能传输大约7GB/S的数据,具体运行频率 需要视difftest模式情况而计算,因为不同模式下的difftest产生的数据量不一样

@xiaokamikami
Copy link
Contributor Author

这套框架怎么用起来? 需要在FPGA流程里使用吗?

你好,暂时还没有完全适配好,后续会出文档的

@xiaokamikami xiaokamikami force-pushed the pcie-difftest branch 3 times, most recently from 3ba5887 to 2c3e0a2 Compare November 1, 2024 10:59
@xiaokamikami xiaokamikami force-pushed the pcie-difftest branch 7 times, most recently from c674bc8 to 756742c Compare January 8, 2025 10:06
@xiaokamikami xiaokamikami marked this pull request as ready for review January 8, 2025 10:26
Copy link
Member

@poemonsense poemonsense left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

The code looks good to me except for two minor changes

fpga.mk Outdated
$(FPGA_TARGET): $(FPGA_CXXFILES) | $(FPGA_TARGET_DIR)
$(CXX) $(FPGA_CXXFLAGS) $(FPGA_CXXFILES) -o $@ $(FPGA_LDFLAGS)

$(FPGA_TARGET_DIR):
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This is useless now. Please remove it

@@ -112,6 +112,9 @@ class SimMemory {
uint64_t get_size() {
return memory_size;
}
uint64_t get_load_img_size() {
return get_img_size();
}
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This can be removed now using the public get_img_size method

Copy link
Member

@poemonsense poemonsense left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM now. @klin02 take a look?

@klin02
Copy link
Member

klin02 commented Jan 9, 2025

OK, I will review it tomorrow.

@klin02 klin02 merged commit 5008e4f into master Jan 10, 2025
5 checks passed
@klin02 klin02 deleted the pcie-difftest branch January 10, 2025 08:34
klin02 added a commit that referenced this pull request Jan 10, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

Simulation on Palladium and FPGA
5 participants