cpu: Open enable_difftest_inst_trace by default (#220)

* cpu: Open enable_difftest_inst_trace by default Change-Id: Id5e8e807017c5cde445d724577013f2f8bd6625d * cpu: change memory check ref_so_path Change-Id: Ic8b3733e37eae0635fa56b5b50916c58c2d8b291
OpenXiangShan · Dec 4, 2024 · 92c006e · 92c006e
1 parent 8afb8ea
commit 92c006e
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
@@ -160,7 +160,7 @@ def takeOverFrom(self, old_cpu):
     arch_db = Param.ArchDBer(Parent.any, "Arch DB")
     enable_riscv_vector = Param.Bool(False, "Enable riscv vector extension")
     enable_riscv_h = Param.Bool(True, "Enable riscv vector extension")
-    enable_difftest_inst_trace = Param.Bool(False, "Enable difftest inst trace")
+    enable_difftest_inst_trace = Param.Bool(True, "Enable difftest inst trace")
     enable_mem_dedup = Param.Bool(False, "Enable memory deduplication for difftest and golden memory")
 
     def createInterruptController(self):

diff --git a/util/memory_check/run-xs-with-valgrind.sh b/util/memory_check/run-xs-with-valgrind.sh
@@ -2,7 +2,7 @@ set -x
 
 gem5_home=$(pwd)
 gcpt_restore_path=/nfs/home/share/gem5_shared_tools/normal-gcb-restorer.bin
-ref_so_path=/nfs/home/share/gem5_shared_tools/riscv64-nemu-4332a525-so
+ref_so_path=/nfs-nvme/home/share/zhenhao/ref-h/build/riscv64-nemu-interpreter-so
 test_cpt=/nfs/home/share/jiaxiaoyu/simpoint_checkpoint_archive/spec06_rv64gcb_O3_20m_gcc12.2.0-intFpcOff-jeMalloc/checkpoint-0-0-0/GemsFDTD/30385/_30385_0.268180_.gz
 
 export NEMU_HOME=$ref_so_path  # dummy