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從 C 語言到 Verilog

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Name		Name	Last commit message	Last commit date
Latest commit History 8 Commits
bin		bin
example		example
md		md
src		src
test		test
.DS_Store		.DS_Store
.gitignore		.gitignore
LICENSE		LICENSE
README.md		README.md

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c2verilog -- 從軟體到硬體的具體而微設計

電子書 -- https://github.com/cccbook/c2verilog/wiki

程式	說明	語言
cc0	編譯器 (Compiler)	C
ir0	中間碼解譯器 (Interpreter)	C
ma0	巨集處理器 (Macro Processor)	C
as0	組譯器 (Assembler)	C
vm0	虛擬機 (Virtual Machine)	C
os0	作業系統 (Operating System)	C
hm0	硬體電腦 (CPU + Computer)	Verilog

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從 C 語言到 Verilog

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Assembly 84.7%
C 10.4%
Verilog 4.5%
Makefile 0.2%
M 0.1%
C++ 0.1%