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Fix operand order for vpexpandd/vpexpandq. (#7125)
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These appear to have been backwards since they were originally
introduced in a9ddaf2.
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khuey authored Dec 12, 2024
1 parent 0afb19d commit f893bd7
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2 changes: 2 additions & 0 deletions api/docs/release.dox
Original file line number Diff line number Diff line change
Expand Up @@ -143,6 +143,8 @@ Further non-compatibility-affecting changes include:
- Added the AArch64 FPMR register as DR_REG_FPMR.
- Added OPSZ_addr which chooses the appropriate operand size on X86 from 2/4/8 based
on the 32/64 bit mode and the presence or absence of the address size prefix.
- Fixed the order of operands for the vpexpandd/vpexpandq opcodes (previously the
source and destination operands were reversed).

**************************************************
<hr>
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4 changes: 2 additions & 2 deletions core/ir/x86/decode_table.c
Original file line number Diff line number Diff line change
Expand Up @@ -8995,9 +8995,9 @@ const instr_info_t evex_Wb_extensions[][4] = {
{OP_vpcompressq, 0x66388b48, catSIMD, "vpcompressq", We, xx, KEb, Ve, xx, mrm|evex|reqp|ttt1s, x, END_LIST},
{INVALID, 0x66388b58, catUncategorized, "(bad)", xx,xx,xx,xx,xx,no,x,NA},
}, { /* evex_W_ext 168 */
{OP_vpexpandd, 0x66388908, catSIMD, "vpexpandd", We, xx, KEw, Ve, xx, mrm|evex|reqp|ttt1s, x, END_LIST},
{OP_vpexpandd, 0x66388908, catSIMD, "vpexpandd", Ve, xx, KEw, We, xx, mrm|evex|reqp|ttt1s, x, END_LIST},
{INVALID, 0x66388918, catUncategorized, "(bad)", xx,xx,xx,xx,xx,no,x,NA},
{OP_vpexpandq, 0x66388948, catSIMD, "vpexpandq", We, xx, KEb, Ve, xx, mrm|evex|reqp|ttt1s, x, END_LIST},
{OP_vpexpandq, 0x66388948, catSIMD, "vpexpandq", Ve, xx, KEb, We, xx, mrm|evex|reqp|ttt1s, x, END_LIST},
{INVALID, 0x66388958, catUncategorized, "(bad)", xx,xx,xx,xx,xx,no,x,NA},
}, { /* evex_W_ext 169 */
{OP_vptestmb, 0x66382608, catSIMD, "vptestmb", KPq, xx, KEq, He, We, mrm|evex|ttfvm, x, END_LIST},
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72 changes: 36 additions & 36 deletions suite/tests/api/ir_x86_3args_avx512_evex_mask.h
Original file line number Diff line number Diff line change
Expand Up @@ -2771,42 +2771,42 @@ OPCODE(vpcompressq_zlok0zlo, vpcompressq, vpcompressq_mask, 0, REGARG(ZMM1), REG
REGARG(ZMM0))
OPCODE(vpcompressq_zhik7zhi, vpcompressq, vpcompressq_mask, X64_ONLY, REGARG(ZMM31),
REGARG(K7), REGARG(ZMM16))
OPCODE(vpexpandd_xlok0st, vpexpandd, vpexpandd_mask, 0, MEMARG(OPSZ_16), REGARG(K0),
REGARG(XMM0))
OPCODE(vpexpandd_xlok0xlo, vpexpandd, vpexpandd_mask, 0, REGARG(XMM1), REGARG(K0),
REGARG(XMM0))
OPCODE(vpexpandd_xhik7xhi, vpexpandd, vpexpandd_mask, X64_ONLY, REGARG(XMM31), REGARG(K7),
REGARG(XMM16))
OPCODE(vpexpandd_ylok0st, vpexpandd, vpexpandd_mask, 0, MEMARG(OPSZ_32), REGARG(K0),
REGARG(YMM0))
OPCODE(vpexpandd_ylok0ylo, vpexpandd, vpexpandd_mask, 0, REGARG(YMM1), REGARG(K0),
REGARG(YMM0))
OPCODE(vpexpandd_yhik7yhi, vpexpandd, vpexpandd_mask, X64_ONLY, REGARG(YMM31), REGARG(K7),
REGARG(YMM16))
OPCODE(vpexpandd_zlok0st, vpexpandd, vpexpandd_mask, 0, MEMARG(OPSZ_64), REGARG(K0),
REGARG(ZMM0))
OPCODE(vpexpandd_zlok0zlo, vpexpandd, vpexpandd_mask, 0, REGARG(ZMM1), REGARG(K0),
REGARG(ZMM0))
OPCODE(vpexpandd_zhik7zhi, vpexpandd, vpexpandd_mask, X64_ONLY, REGARG(ZMM31), REGARG(K7),
REGARG(ZMM16))
OPCODE(vpexpandq_xlok0st, vpexpandq, vpexpandq_mask, 0, MEMARG(OPSZ_16), REGARG(K0),
REGARG(XMM0))
OPCODE(vpexpandq_xlok0xlo, vpexpandq, vpexpandq_mask, 0, REGARG(XMM1), REGARG(K0),
REGARG(XMM0))
OPCODE(vpexpandq_xhik7xhi, vpexpandq, vpexpandq_mask, X64_ONLY, REGARG(XMM31), REGARG(K7),
REGARG(XMM16))
OPCODE(vpexpandq_ylok0st, vpexpandq, vpexpandq_mask, 0, MEMARG(OPSZ_32), REGARG(K0),
REGARG(YMM0))
OPCODE(vpexpandq_ylok0ylo, vpexpandq, vpexpandq_mask, 0, REGARG(YMM1), REGARG(K0),
REGARG(YMM0))
OPCODE(vpexpandq_yhik7yhi, vpexpandq, vpexpandq_mask, X64_ONLY, REGARG(YMM31), REGARG(K7),
REGARG(YMM16))
OPCODE(vpexpandq_zlok0st, vpexpandq, vpexpandq_mask, 0, MEMARG(OPSZ_64), REGARG(K0),
REGARG(ZMM0))
OPCODE(vpexpandq_zlok0zlo, vpexpandq, vpexpandq_mask, 0, REGARG(ZMM1), REGARG(K0),
REGARG(ZMM0))
OPCODE(vpexpandq_zhik7zhi, vpexpandq, vpexpandq_mask, X64_ONLY, REGARG(ZMM31), REGARG(K7),
REGARG(ZMM16))
OPCODE(vpexpandd_xlok0ld, vpexpandd, vpexpandd_mask, 0, REGARG(XMM0), REGARG(K0),
MEMARG(OPSZ_16))
OPCODE(vpexpandd_xlok0xlo, vpexpandd, vpexpandd_mask, 0, REGARG(XMM0), REGARG(K0),
REGARG(XMM1))
OPCODE(vpexpandd_xhik7xhi, vpexpandd, vpexpandd_mask, X64_ONLY, REGARG(XMM16), REGARG(K7),
REGARG(XMM31))
OPCODE(vpexpandd_ylok0ld, vpexpandd, vpexpandd_mask, 0, REGARG(YMM0), REGARG(K0),
MEMARG(OPSZ_32))
OPCODE(vpexpandd_ylok0ylo, vpexpandd, vpexpandd_mask, 0, REGARG(YMM0), REGARG(K0),
REGARG(YMM1))
OPCODE(vpexpandd_yhik7yhi, vpexpandd, vpexpandd_mask, X64_ONLY, REGARG(YMM16), REGARG(K7),
REGARG(YMM31))
OPCODE(vpexpandd_zlok0ld, vpexpandd, vpexpandd_mask, 0, REGARG(ZMM0), REGARG(K0),
MEMARG(OPSZ_64))
OPCODE(vpexpandd_zlok0zlo, vpexpandd, vpexpandd_mask, 0, REGARG(ZMM0), REGARG(K0),
REGARG(ZMM1))
OPCODE(vpexpandd_zhik7zhi, vpexpandd, vpexpandd_mask, X64_ONLY, REGARG(ZMM16), REGARG(K7),
REGARG(ZMM31))
OPCODE(vpexpandq_xlok0ld, vpexpandq, vpexpandq_mask, 0, REGARG(XMM0), REGARG(K0),
MEMARG(OPSZ_16))
OPCODE(vpexpandq_xlok0xlo, vpexpandq, vpexpandq_mask, 0, REGARG(XMM0), REGARG(K0),
REGARG(XMM1))
OPCODE(vpexpandq_xhik7xhi, vpexpandq, vpexpandq_mask, X64_ONLY, REGARG(XMM16), REGARG(K7),
REGARG(XMM31))
OPCODE(vpexpandq_ylok0ld, vpexpandq, vpexpandq_mask, 0, REGARG(YMM0), REGARG(K0),
MEMARG(OPSZ_32))
OPCODE(vpexpandq_ylok0ylo, vpexpandq, vpexpandq_mask, 0, REGARG(YMM0), REGARG(K0),
REGARG(YMM1))
OPCODE(vpexpandq_yhik7yhi, vpexpandq, vpexpandq_mask, X64_ONLY, REGARG(YMM16), REGARG(K7),
REGARG(YMM31))
OPCODE(vpexpandq_zlok0ld, vpexpandq, vpexpandq_mask, 0, REGARG(ZMM0), REGARG(K0),
MEMARG(OPSZ_64))
OPCODE(vpexpandq_zlok0zlo, vpexpandq, vpexpandq_mask, 0, REGARG(ZMM0), REGARG(K0),
REGARG(ZMM1))
OPCODE(vpexpandq_zhik7zhi, vpexpandq, vpexpandq_mask, X64_ONLY, REGARG(ZMM16), REGARG(K7),
REGARG(ZMM31))
OPCODE(vrsqrt14ps_xlok0ld, vrsqrt14ps, vrsqrt14ps_mask, 0, REGARG(XMM0), REGARG(K0),
MEMARG(OPSZ_16))
OPCODE(vrsqrt14ps_xlok0bcst, vrsqrt14ps, vrsqrt14ps_mask, 0, REGARG(XMM0), REGARG(K0),
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