Enable more binutils tests. (#7134)

Pick up some gfni and vnni tests that pass but had not been enabled.
DynamoRIO · Dec 14, 2024 · 1f67ae1 · 1f67ae1
1 parent 7702507
commit 1f67ae1
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diff --git a/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect b/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect
@@ -98782,6 +98782,222 @@ test_x86_64_s:
  62 22 15 20 cf b4 f0 vgf2p8mulb %ymm29, 0x00001234(%rax,%r14,8), %ymm30 {%k0}
  34 12 00 00
  62 62 15 20 cf 72 7f vgf2p8mulb %ymm29, 0x00000fe0(%rdx), %ymm30 {%k0}
+ 62 a2 6d 40 52 d1    vpdpwssd %zmm18, %zmm17, %zmm18 {%k0}
+ 62 a2 6d 45 52 d1    vpdpwssd %zmm18, %zmm17, %zmm18 {%k5}
+ 62 a2 6d c5 52 d1    vpdpwssd %zmm18, %zmm17, %zmm18 {%k5}
+ 62 a2 6d 40 52 94 f0 vpdpwssd %zmm18, 0x00000123(%rax,%r14,8), %zmm18 {%k0}
+ 23 01 00 00
+ 62 e2 6d 40 52 52 7f vpdpwssd %zmm18, 0x00001fc0(%rdx), %zmm18 {%k0}
+ 62 e2 6d 50 52 52 7f vpdpwssd %zmm18, 0x000001fc(%rdx), %zmm18 {%k0}
+ 62 a2 55 40 53 e9    vpdpwssds %zmm21, %zmm17, %zmm21 {%k0}
+ 62 a2 55 44 53 e9    vpdpwssds %zmm21, %zmm17, %zmm21 {%k4}
+ 62 a2 55 c4 53 e9    vpdpwssds %zmm21, %zmm17, %zmm21 {%k4}
+ 62 a2 55 40 53 ac f0 vpdpwssds %zmm21, 0x00000123(%rax,%r14,8), %zmm21 {%k0}
+ 23 01 00 00
+ 62 e2 55 40 53 6a 7f vpdpwssds %zmm21, 0x00001fc0(%rdx), %zmm21 {%k0}
+ 62 e2 55 50 53 6a 7f vpdpwssds %zmm21, 0x000001fc(%rdx), %zmm21 {%k0}
+ 62 a2 55 40 50 fa    vpdpbusd %zmm21, %zmm18, %zmm23 {%k0}
+ 62 a2 55 44 50 fa    vpdpbusd %zmm21, %zmm18, %zmm23 {%k4}
+ 62 a2 55 c4 50 fa    vpdpbusd %zmm21, %zmm18, %zmm23 {%k4}
+ 62 a2 55 40 50 bc f0 vpdpbusd %zmm21, 0x00000123(%rax,%r14,8), %zmm23 {%k0}
+ 23 01 00 00
+ 62 e2 55 40 50 7a 7f vpdpbusd %zmm21, 0x00001fc0(%rdx), %zmm23 {%k0}
+ 62 e2 55 50 50 7a 7f vpdpbusd %zmm21, 0x000001fc(%rdx), %zmm23 {%k0}
+ 62 02 3d 40 51 c1    vpdpbusds %zmm24, %zmm25, %zmm24 {%k0}
+ 62 02 3d 47 51 c1    vpdpbusds %zmm24, %zmm25, %zmm24 {%k7}
+ 62 02 3d c7 51 c1    vpdpbusds %zmm24, %zmm25, %zmm24 {%k7}
+ 62 22 3d 40 51 84 f0 vpdpbusds %zmm24, 0x00000123(%rax,%r14,8), %zmm24 {%k0}
+ 23 01 00 00
+ 62 62 3d 40 51 42 7f vpdpbusds %zmm24, 0x00001fc0(%rdx), %zmm24 {%k0}
+ 62 62 3d 50 51 42 7f vpdpbusds %zmm24, 0x000001fc(%rdx), %zmm24 {%k0}
+ 62 22 25 40 52 e1    vpdpwssd %zmm27, %zmm17, %zmm28 {%k0}
+ 62 22 25 47 52 e1    vpdpwssd %zmm27, %zmm17, %zmm28 {%k7}
+ 62 22 25 c7 52 e1    vpdpwssd %zmm27, %zmm17, %zmm28 {%k7}
+ 62 22 25 40 52 a4 f0 vpdpwssd %zmm27, 0x00001234(%rax,%r14,8), %zmm28 {%k0}
+ 34 12 00 00
+ 62 62 25 40 52 62 7f vpdpwssd %zmm27, 0x00001fc0(%rdx), %zmm28 {%k0}
+ 62 62 25 50 52 62 7f vpdpwssd %zmm27, 0x000001fc(%rdx), %zmm28 {%k0}
+ 62 22 1d 40 53 e9    vpdpwssds %zmm28, %zmm17, %zmm29 {%k0}
+ 62 22 1d 43 53 e9    vpdpwssds %zmm28, %zmm17, %zmm29 {%k3}
+ 62 22 1d c3 53 e9    vpdpwssds %zmm28, %zmm17, %zmm29 {%k3}
+ 62 22 1d 40 53 ac f0 vpdpwssds %zmm28, 0x00001234(%rax,%r14,8), %zmm29 {%k0}
+ 34 12 00 00
+ 62 62 1d 40 53 6a 7f vpdpwssds %zmm28, 0x00001fc0(%rdx), %zmm29 {%k0}
+ 62 62 1d 50 53 6a 7f vpdpwssds %zmm28, 0x000001fc(%rdx), %zmm29 {%k0}
+ 62 22 3d 40 50 e5    vpdpbusd %zmm24, %zmm21, %zmm28 {%k0}
+ 62 22 3d 46 50 e5    vpdpbusd %zmm24, %zmm21, %zmm28 {%k6}
+ 62 22 3d c6 50 e5    vpdpbusd %zmm24, %zmm21, %zmm28 {%k6}
+ 62 22 3d 40 50 a4 f0 vpdpbusd %zmm24, 0x00001234(%rax,%r14,8), %zmm28 {%k0}
+ 34 12 00 00
+ 62 62 3d 40 50 62 7f vpdpbusd %zmm24, 0x00001fc0(%rdx), %zmm28 {%k0}
+ 62 62 3d 50 50 62 7f vpdpbusd %zmm24, 0x000001fc(%rdx), %zmm28 {%k0}
+ 62 a2 75 40 51 e4    vpdpbusds %zmm17, %zmm20, %zmm20 {%k0}
+ 62 a2 75 42 51 e4    vpdpbusds %zmm17, %zmm20, %zmm20 {%k2}
+ 62 a2 75 c2 51 e4    vpdpbusds %zmm17, %zmm20, %zmm20 {%k2}
+ 62 a2 75 40 51 a4 f0 vpdpbusds %zmm17, 0x00001234(%rax,%r14,8), %zmm20 {%k0}
+ 34 12 00 00
+ 62 e2 75 40 51 62 7f vpdpbusds %zmm17, 0x00001fc0(%rdx), %zmm20 {%k0}
+ 62 e2 75 50 51 62 7f vpdpbusds %zmm17, 0x000001fc(%rdx), %zmm20 {%k0}
+ 62 22 4d 00 52 d4    vpdpwssd %xmm22, %xmm20, %xmm26 {%k0}
+ 62 22 4d 03 52 d4    vpdpwssd %xmm22, %xmm20, %xmm26 {%k3}
+ 62 22 4d 83 52 d4    vpdpwssd %xmm22, %xmm20, %xmm26 {%k3}
+ 62 22 4d 00 52 94 f0 vpdpwssd %xmm22, 0x00000123(%rax,%r14,8), %xmm26 {%k0}
+ 23 01 00 00
+ 62 62 4d 00 52 52 7f vpdpwssd %xmm22, 0x000007f0(%rdx), %xmm26 {%k0}
+ 62 62 4d 10 52 52 7f vpdpwssd %xmm22, 0x000001fc(%rdx), %xmm26 {%k0}
+ 62 a2 5d 20 52 e2    vpdpwssd %ymm20, %ymm18, %ymm20 {%k0}
+ 62 a2 5d 25 52 e2    vpdpwssd %ymm20, %ymm18, %ymm20 {%k5}
+ 62 a2 5d a5 52 e2    vpdpwssd %ymm20, %ymm18, %ymm20 {%k5}
+ 62 a2 5d 20 52 a4 f0 vpdpwssd %ymm20, 0x00000123(%rax,%r14,8), %ymm20 {%k0}
+ 23 01 00 00
+ 62 e2 5d 20 52 62 7f vpdpwssd %ymm20, 0x00000fe0(%rdx), %ymm20 {%k0}
+ 62 e2 5d 30 52 62 7f vpdpwssd %ymm20, 0x000001fc(%rdx), %ymm20 {%k0}
+ 62 a2 65 00 53 f7    vpdpwssds %xmm19, %xmm23, %xmm22 {%k0}
+ 62 a2 65 07 53 f7    vpdpwssds %xmm19, %xmm23, %xmm22 {%k7}
+ 62 a2 65 87 53 f7    vpdpwssds %xmm19, %xmm23, %xmm22 {%k7}
+ 62 a2 65 00 53 b4 f0 vpdpwssds %xmm19, 0x00000123(%rax,%r14,8), %xmm22 {%k0}
+ 23 01 00 00
+ 62 e2 65 00 53 72 7f vpdpwssds %xmm19, 0x000007f0(%rdx), %xmm22 {%k0}
+ 62 e2 65 10 53 72 7f vpdpwssds %xmm19, 0x000001fc(%rdx), %xmm22 {%k0}
+ 62 82 45 20 53 fc    vpdpwssds %ymm23, %ymm28, %ymm23 {%k0}
+ 62 82 45 23 53 fc    vpdpwssds %ymm23, %ymm28, %ymm23 {%k3}
+ 62 82 45 a3 53 fc    vpdpwssds %ymm23, %ymm28, %ymm23 {%k3}
+ 62 a2 45 20 53 bc f0 vpdpwssds %ymm23, 0x00000123(%rax,%r14,8), %ymm23 {%k0}
+ 23 01 00 00
+ 62 e2 45 20 53 7a 7f vpdpwssds %ymm23, 0x00000fe0(%rdx), %ymm23 {%k0}
+ 62 e2 45 30 53 7a 7f vpdpwssds %ymm23, 0x000001fc(%rdx), %ymm23 {%k0}
+ 62 82 15 00 50 d4    vpdpbusd %xmm29, %xmm28, %xmm18 {%k0}
+ 62 82 15 03 50 d4    vpdpbusd %xmm29, %xmm28, %xmm18 {%k3}
+ 62 82 15 83 50 d4    vpdpbusd %xmm29, %xmm28, %xmm18 {%k3}
+ 62 a2 15 00 50 94 f0 vpdpbusd %xmm29, 0x00000123(%rax,%r14,8), %xmm18 {%k0}
+ 23 01 00 00
+ 62 e2 15 00 50 52 7f vpdpbusd %xmm29, 0x000007f0(%rdx), %xmm18 {%k0}
+ 62 e2 15 10 50 52 7f vpdpbusd %xmm29, 0x000001fc(%rdx), %xmm18 {%k0}
+ 62 a2 6d 20 50 e1    vpdpbusd %ymm18, %ymm17, %ymm20 {%k0}
+ 62 a2 6d 22 50 e1    vpdpbusd %ymm18, %ymm17, %ymm20 {%k2}
+ 62 a2 6d a2 50 e1    vpdpbusd %ymm18, %ymm17, %ymm20 {%k2}
+ 62 a2 6d 20 50 a4 f0 vpdpbusd %ymm18, 0x00000123(%rax,%r14,8), %ymm20 {%k0}
+ 23 01 00 00
+ 62 e2 6d 20 50 62 7f vpdpbusd %ymm18, 0x00000fe0(%rdx), %ymm20 {%k0}
+ 62 e2 6d 30 50 62 7f vpdpbusd %ymm18, 0x000001fc(%rdx), %ymm20 {%k0}
+ 62 02 2d 00 51 c3    vpdpbusds %xmm26, %xmm27, %xmm24 {%k0}
+ 62 02 2d 04 51 c3    vpdpbusds %xmm26, %xmm27, %xmm24 {%k4}
+ 62 02 2d 84 51 c3    vpdpbusds %xmm26, %xmm27, %xmm24 {%k4}
+ 62 22 2d 00 51 84 f0 vpdpbusds %xmm26, 0x00000123(%rax,%r14,8), %xmm24 {%k0}
+ 23 01 00 00
+ 62 62 2d 00 51 42 7f vpdpbusds %xmm26, 0x000007f0(%rdx), %xmm24 {%k0}
+ 62 62 2d 10 51 42 7f vpdpbusds %xmm26, 0x000001fc(%rdx), %xmm24 {%k0}
+ 62 02 15 20 51 f1    vpdpbusds %ymm29, %ymm25, %ymm30 {%k0}
+ 62 02 15 21 51 f1    vpdpbusds %ymm29, %ymm25, %ymm30 {%k1}
+ 62 02 15 a1 51 f1    vpdpbusds %ymm29, %ymm25, %ymm30 {%k1}
+ 62 22 15 20 51 b4 f0 vpdpbusds %ymm29, 0x00000123(%rax,%r14,8), %ymm30 {%k0}
+ 23 01 00 00
+ 62 62 15 20 51 72 7f vpdpbusds %ymm29, 0x00000fe0(%rdx), %ymm30 {%k0}
+ 62 62 15 30 51 72 7f vpdpbusds %ymm29, 0x000001fc(%rdx), %ymm30 {%k0}
+ 62 a2 5d 00 52 ef    vpdpwssd %xmm20, %xmm23, %xmm21 {%k0}
+ 62 a2 5d 06 52 ef    vpdpwssd %xmm20, %xmm23, %xmm21 {%k6}
+ 62 a2 5d 86 52 ef    vpdpwssd %xmm20, %xmm23, %xmm21 {%k6}
+ 62 a2 5d 00 52 ac f0 vpdpwssd %xmm20, 0x00001234(%rax,%r14,8), %xmm21 {%k0}
+ 34 12 00 00
+ 62 e2 5d 00 52 6a 7f vpdpwssd %xmm20, 0x000007f0(%rdx), %xmm21 {%k0}
+ 62 e2 5d 10 52 6a 7f vpdpwssd %xmm20, 0x000001fc(%rdx), %xmm21 {%k0}
+ 62 22 25 20 52 c9    vpdpwssd %ymm27, %ymm17, %ymm25 {%k0}
+ 62 22 25 26 52 c9    vpdpwssd %ymm27, %ymm17, %ymm25 {%k6}
+ 62 22 25 a6 52 c9    vpdpwssd %ymm27, %ymm17, %ymm25 {%k6}
+ 62 22 25 20 52 8c f0 vpdpwssd %ymm27, 0x00001234(%rax,%r14,8), %ymm25 {%k0}
+ 34 12 00 00
+ 62 62 25 20 52 4a 7f vpdpwssd %ymm27, 0x00000fe0(%rdx), %ymm25 {%k0}
+ 62 62 25 30 52 4a 7f vpdpwssd %ymm27, 0x000001fc(%rdx), %ymm25 {%k0}
+ 62 22 35 00 53 f5    vpdpwssds %xmm25, %xmm21, %xmm30 {%k0}
+ 62 22 35 06 53 f5    vpdpwssds %xmm25, %xmm21, %xmm30 {%k6}
+ 62 22 35 86 53 f5    vpdpwssds %xmm25, %xmm21, %xmm30 {%k6}
+ 62 22 35 00 53 b4 f0 vpdpwssds %xmm25, 0x00001234(%rax,%r14,8), %xmm30 {%k0}
+ 34 12 00 00
+ 62 62 35 00 53 72 7f vpdpwssds %xmm25, 0x000007f0(%rdx), %xmm30 {%k0}
+ 62 62 35 10 53 72 7f vpdpwssds %xmm25, 0x000001fc(%rdx), %xmm30 {%k0}
+ 62 02 25 20 53 e3    vpdpwssds %ymm27, %ymm27, %ymm28 {%k0}
+ 62 02 25 27 53 e3    vpdpwssds %ymm27, %ymm27, %ymm28 {%k7}
+ 62 02 25 a7 53 e3    vpdpwssds %ymm27, %ymm27, %ymm28 {%k7}
+ 62 22 25 20 53 a4 f0 vpdpwssds %ymm27, 0x00001234(%rax,%r14,8), %ymm28 {%k0}
+ 34 12 00 00
+ 62 62 25 20 53 62 7f vpdpwssds %ymm27, 0x00000fe0(%rdx), %ymm28 {%k0}
+ 62 62 25 30 53 62 7f vpdpwssds %ymm27, 0x000001fc(%rdx), %ymm28 {%k0}
+ 62 22 6d 00 50 d3    vpdpbusd %xmm18, %xmm19, %xmm26 {%k0}
+ 62 22 6d 06 50 d3    vpdpbusd %xmm18, %xmm19, %xmm26 {%k6}
+ 62 22 6d 86 50 d3    vpdpbusd %xmm18, %xmm19, %xmm26 {%k6}
+ 62 22 6d 00 50 94 f0 vpdpbusd %xmm18, 0x00001234(%rax,%r14,8), %xmm26 {%k0}
+ 34 12 00 00
+ 62 62 6d 00 50 52 7f vpdpbusd %xmm18, 0x000007f0(%rdx), %xmm26 {%k0}
+ 62 62 6d 10 50 52 7f vpdpbusd %xmm18, 0x000001fc(%rdx), %xmm26 {%k0}
+ 62 82 75 20 50 eb    vpdpbusd %ymm17, %ymm27, %ymm21 {%k0}
+ 62 82 75 22 50 eb    vpdpbusd %ymm17, %ymm27, %ymm21 {%k2}
+ 62 82 75 a2 50 eb    vpdpbusd %ymm17, %ymm27, %ymm21 {%k2}
+ 62 a2 75 20 50 ac f0 vpdpbusd %ymm17, 0x00001234(%rax,%r14,8), %ymm21 {%k0}
+ 34 12 00 00
+ 62 e2 75 20 50 6a 7f vpdpbusd %ymm17, 0x00000fe0(%rdx), %ymm21 {%k0}
+ 62 e2 75 30 50 6a 7f vpdpbusd %ymm17, 0x000001fc(%rdx), %ymm21 {%k0}
+ 62 02 2d 00 51 e0    vpdpbusds %xmm26, %xmm24, %xmm28 {%k0}
+ 62 02 2d 01 51 e0    vpdpbusds %xmm26, %xmm24, %xmm28 {%k1}
+ 62 02 2d 81 51 e0    vpdpbusds %xmm26, %xmm24, %xmm28 {%k1}
+ 62 22 2d 00 51 a4 f0 vpdpbusds %xmm26, 0x00001234(%rax,%r14,8), %xmm28 {%k0}
+ 34 12 00 00
+ 62 62 2d 00 51 62 7f vpdpbusds %xmm26, 0x000007f0(%rdx), %xmm28 {%k0}
+ 62 62 2d 10 51 62 7f vpdpbusds %xmm26, 0x000001fc(%rdx), %xmm28 {%k0}
+ 62 82 6d 20 51 fb    vpdpbusds %ymm18, %ymm27, %ymm23 {%k0}
+ 62 82 6d 26 51 fb    vpdpbusds %ymm18, %ymm27, %ymm23 {%k6}
+ 62 82 6d a6 51 fb    vpdpbusds %ymm18, %ymm27, %ymm23 {%k6}
+ 62 a2 6d 20 51 bc f0 vpdpbusds %ymm18, 0x00001234(%rax,%r14,8), %ymm23 {%k0}
+ 34 12 00 00
+ 62 e2 6d 20 51 7a 7f vpdpbusds %ymm18, 0x00000fe0(%rdx), %ymm23 {%k0}
+ 62 e2 6d 30 51 7a 7f vpdpbusds %ymm18, 0x000001fc(%rdx), %ymm23 {%k0}
+ c4 e2 55 cf f4       vgf2p8mulb %ymm5, %ymm4, %ymm6
+ c4 a2 55 cf b4 f0 c0 vgf2p8mulb %ymm5, -0x0001e240(%rax,%r14,8), %ymm6
+ 1d fe ff
+ c4 e2 55 cf 72 7e    vgf2p8mulb %ymm5, 0x7e(%rdx), %ymm6
+ c4 e3 d5 ce f4 ab    vgf2p8affineqb %ymm5, %ymm4, $0xab, %ymm6
+ c4 a3 d5 ce b4 f0 c0 vgf2p8affineqb %ymm5, -0x0001e240(%rax,%r14,8), $0x7b, %ymm6
+ 1d fe ff 7b
+ c4 e3 d5 ce 72 7e 7b vgf2p8affineqb %ymm5, 0x7e(%rdx), $0x7b, %ymm6
+ c4 e3 d5 cf f4 ab    vgf2p8affineinvqb %ymm5, %ymm4, $0xab, %ymm6
+ c4 a3 d5 cf b4 f0 c0 vgf2p8affineinvqb %ymm5, -0x0001e240(%rax,%r14,8), $0x7b, %ymm6
+ 1d fe ff 7b
+ c4 e3 d5 cf 72 7e 7b vgf2p8affineinvqb %ymm5, 0x7e(%rdx), $0x7b, %ymm6
+ c4 e2 51 cf f4       vgf2p8mulb %xmm5, %xmm4, %xmm6
+ c4 a2 51 cf b4 f0 c0 vgf2p8mulb %xmm5, -0x0001e240(%rax,%r14,8), %xmm6
+ 1d fe ff
+ c4 e2 51 cf 72 7e    vgf2p8mulb %xmm5, 0x7e(%rdx), %xmm6
+ c4 e3 d1 ce f4 ab    vgf2p8affineqb %xmm5, %xmm4, $0xab, %xmm6
+ c4 a3 d1 ce b4 f0 c0 vgf2p8affineqb %xmm5, -0x0001e240(%rax,%r14,8), $0x7b, %xmm6
+ 1d fe ff 7b
+ c4 e3 d1 ce 72 7e 7b vgf2p8affineqb %xmm5, 0x7e(%rdx), $0x7b, %xmm6
+ c4 e3 d1 cf f4 ab    vgf2p8affineinvqb %xmm5, %xmm4, $0xab, %xmm6
+ c4 a3 d1 cf b4 f0 c0 vgf2p8affineinvqb %xmm5, -0x0001e240(%rax,%r14,8), $0x7b, %xmm6
+ 1d fe ff 7b
+ c4 e3 d1 cf 72 7e 7b vgf2p8affineinvqb %xmm5, 0x7e(%rdx), $0x7b, %xmm6
+ c4 e2 55 cf f4       vgf2p8mulb %ymm5, %ymm4, %ymm6
+ c4 a2 55 cf b4 f0 c0 vgf2p8mulb %ymm5, -0x0001e240(%rax,%r14,8), %ymm6
+ 1d fe ff
+ c4 e2 55 cf 72 7e    vgf2p8mulb %ymm5, 0x7e(%rdx), %ymm6
+ c4 e3 d5 ce f4 ab    vgf2p8affineqb %ymm5, %ymm4, $0xab, %ymm6
+ c4 a3 d5 ce b4 f0 c0 vgf2p8affineqb %ymm5, -0x0001e240(%rax,%r14,8), $0x7b, %ymm6
+ 1d fe ff 7b
+ c4 e3 d5 ce 72 7e 7b vgf2p8affineqb %ymm5, 0x7e(%rdx), $0x7b, %ymm6
+ c4 e3 d5 cf f4 ab    vgf2p8affineinvqb %ymm5, %ymm4, $0xab, %ymm6
+ c4 a3 d5 cf b4 f0 c0 vgf2p8affineinvqb %ymm5, -0x0001e240(%rax,%r14,8), $0x7b, %ymm6
+ 1d fe ff 7b
+ c4 e3 d5 cf 72 7e 7b vgf2p8affineinvqb %ymm5, 0x7e(%rdx), $0x7b, %ymm6
+ c4 e2 51 cf f4       vgf2p8mulb %xmm5, %xmm4, %xmm6
+ c4 a2 51 cf b4 f0 c0 vgf2p8mulb %xmm5, -0x0001e240(%rax,%r14,8), %xmm6
+ 1d fe ff
+ c4 e2 51 cf 72 7e    vgf2p8mulb %xmm5, 0x7e(%rdx), %xmm6
+ c4 e3 d1 ce f4 ab    vgf2p8affineqb %xmm5, %xmm4, $0xab, %xmm6
+ c4 a3 d1 ce b4 f0 c0 vgf2p8affineqb %xmm5, -0x0001e240(%rax,%r14,8), $0x7b, %xmm6
+ 1d fe ff 7b
+ c4 e3 d1 ce 72 7e 7b vgf2p8affineqb %xmm5, 0x7e(%rdx), $0x7b, %xmm6
+ c4 e3 d1 cf f4 ab    vgf2p8affineinvqb %xmm5, %xmm4, $0xab, %xmm6
+ c4 a3 d1 cf b4 f0 c0 vgf2p8affineinvqb %xmm5, -0x0001e240(%rax,%r14,8), $0x7b, %xmm6
+ 1d fe ff 7b
+ c4 e3 d1 cf 72 7e 7b vgf2p8affineinvqb %xmm5, 0x7e(%rdx), $0x7b, %xmm6
  62 f1 7d 08 7e 21    vmovd  %xmm4, (%rcx)
  62 f1 7d 08 7e e1    vmovd  %xmm4, %ecx
  62 f1 7d 08 6e 21    vmovd  (%rcx), %xmm4
@@ -104466,7 +104682,7 @@ test_x86_64_s:
  7b 00 00 00
  62 e2 7d 21 91 84 c5 vpgatherqd 0x0000007b(%rbp,%ymm16,8), %ymm16 {%k1} {%k1}
  7b 00 00 00
- 62 f1 7c 48 28 05 00 vmovaps <rel> 0x0000000010072af6, %zmm0 {%k0}
+ 62 f1 7c 48 28 05 00 vmovaps <rel> 0x0000000010073012, %zmm0 {%k0}
  fc ff ff
  62 f1 7c 48 28 04 05 vmovaps 0x40(,%rax), %zmm0 {%k0}
  40 00 00 00
@@ -104715,9 +104931,9 @@ test_x86_64_s:
  48 0f 38 f9 01       movdiri %rax, (%rcx)
  66 0f 38 f8 01       movdir64b (%rcx), %rax
  67 66 0f 38 f8 01    movdir64b (%ecx), %eax
- 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x0000000010073491, %rcx
+ 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x00000000100739ad, %rcx
  00 00
- 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x000000001007349b, %ecx
+ 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x00000000100739b7, %ecx
  00 00 00
  67 66 0f 38 f8 0c 25 movdir64b 0x00, %ecx
  00 00 00 00
@@ -104729,9 +104945,9 @@ test_x86_64_s:
  48 0f 38 f9 01       movdiri %rax, (%rcx)
  66 0f 38 f8 01       movdir64b (%rcx), %rax
  67 66 0f 38 f8 01    movdir64b (%ecx), %eax
- 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x00000000100734d7, %rcx
+ 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x00000000100739f3, %rcx
  00 00
- 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x00000000100734e1, %ecx
+ 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x00000000100739fd, %ecx
  00 00 00
  67 66 0f 38 f8 0c 25 movdir64b 0x00, %ecx
  00 00 00 00
@@ -104741,13 +104957,13 @@ test_x86_64_s:
  67 f2 0f 38 f8 01    enqcmd (%ecx), %eax
  f3 0f 38 f8 01       enqcmds (%rcx), %rax
  67 f3 0f 38 f8 01    enqcmds (%ecx), %eax
- f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x0000000010073516, %rcx
+ f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x0000000010073a32, %rcx
  00 00
- 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x0000000010073520, %ecx
+ 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x0000000010073a3c, %ecx
  00 00 00
- f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x0000000010073529, %rcx
+ f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x0000000010073a45, %rcx
  00 00
- 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x0000000010073533, %ecx
+ 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x0000000010073a4f, %ecx
  00 00 00
  f2 0f 38 f8 0c 25 00 enqcmd 0x00, %rcx
  00 00 00
@@ -104761,13 +104977,13 @@ test_x86_64_s:
  67 f2 0f 38 f8 01    enqcmd (%ecx), %eax
  f3 0f 38 f8 01       enqcmds (%rcx), %rax
  67 f3 0f 38 f8 01    enqcmds (%ecx), %eax
- f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x000000001007357c, %rcx
+ f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x0000000010073a98, %rcx
  00 00
- 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x0000000010073586, %ecx
+ 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x0000000010073aa2, %ecx
  00 00 00
- f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x000000001007358f, %rcx
+ f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x0000000010073aab, %rcx
  00 00
- 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x0000000010073599, %ecx
+ 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x0000000010073ab5, %ecx
  00 00 00
  f2 0f 38 f8 0c 25 00 enqcmd 0x00, %rcx
  00 00 00

diff --git a/third_party/binutils/test_decenc/test_decenc_x86_64.asm b/third_party/binutils/test_decenc/test_decenc_x86_64.asm
@@ -100089,6 +100089,7 @@ GLOBAL_LABEL(FUNCNAME:)
         RAW(34) RAW(12) RAW(00) RAW(00) RAW(7b)
         RAW(62) RAW(e3) RAW(15) RAW(20) RAW(44) RAW(7a) RAW(7f)
         RAW(7b)
+#endif
 
         /* x86_64_avx512vnni.s */
         RAW(62) RAW(a2) RAW(6d) RAW(40) RAW(52) RAW(d1)
@@ -100311,7 +100312,6 @@ GLOBAL_LABEL(FUNCNAME:)
         RAW(c4) RAW(a3) RAW(d1) RAW(cf) RAW(b4) RAW(f0) RAW(c0)
         RAW(1d) RAW(fe) RAW(ff) RAW(7b)
         RAW(c4) RAW(e3) RAW(d1) RAW(cf) RAW(72) RAW(7e) RAW(7b)
-#endif
 
         /* x86_64_evex_lig_2.s */
         RAW(62) RAW(f1) RAW(7d) RAW(08) RAW(7e) RAW(21)