Skip to content

Commit

Permalink
Removed some doxygen warnings
Browse files Browse the repository at this point in the history
  • Loading branch information
@Masmiseim36
Masmiseim36 committed Jul 15, 2023
1 parent 7de5c01 commit ba9c5c3
Show file tree
Hide file tree
Showing 12 changed files with 421 additions and 419 deletions.
754 changes: 376 additions & 378 deletions CMSIS/Core/Include/armv7a.h
View file

Large diffs are not rendered by default.

2 changes: 1 addition & 1 deletion CMSIS/Core/Include/armv7r.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -197,7 +197,7 @@
#define __IOM volatile /*!< \brief Defines 'read / write' structure member permissions */
#define RESERVED(N, T) T RESERVED##N; // placeholder struct members used for "reserved" areas

/*@} end of group ARMv7-R */
/** @} end of group ARMv7-R */



Expand Down
2 changes: 1 addition & 1 deletion CMSIS/Core/Include/armv8a.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -257,7 +257,7 @@
#define __IOM volatile /*!< \brief Defines 'read / write' structure member permissions */
#define RESERVED(N, T) T RESERVED##N; // placeholder struct members used for "reserved" areas

/*@} end of group ARMv8-A */
/** @} end of group ARMv8-A */



Expand Down
2 changes: 1 addition & 1 deletion CMSIS/Core/Include/armv8r.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -252,7 +252,7 @@
#define __IOM volatile /*!< \brief Defines 'read / write' structure member permissions */
#define RESERVED(N, T) T RESERVED##N; // placeholder struct members used for "reserved" areas

/*@} end of group ARMv8-R */
/** @} end of group ARMv8-R */



Expand Down
36 changes: 18 additions & 18 deletions CMSIS/Core/Include/cmsis_armcc.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -469,9 +469,9 @@ __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(in
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
\param [in] val Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
Expand All @@ -493,7 +493,7 @@ __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(in
(defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */

/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/** @} end of group CMSIS_Core_InstructionInterface */


/* ########################### Core Function Access ########################### */
Expand All @@ -516,24 +516,24 @@ __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(in
*/
/* intrinsic void __disable_irq(void); */

#if ((defined (__arm__ ) || \
#if ((defined (__arm__ )) || \
(defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )

/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing special-purpose register FAULTMASK.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing special-purpose register FAULTMASK.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq


/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting special-purpose register FAULTMASK.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting special-purpose register FAULTMASK.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq

#endif /* ( defined (__arm__ ) || \
(defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Expand Down Expand Up @@ -653,6 +653,6 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)

#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3))
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@} end of group CMSIS_SIMD_intrinsics */
/** @} end of group CMSIS_SIMD_intrinsics */

#endif /* __CMSIS_ARMCC_H */
6 changes: 3 additions & 3 deletions CMSIS/Core/Include/cmsis_armclang.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -490,9 +490,9 @@ __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
\param [in] val Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
Expand Down
6 changes: 3 additions & 3 deletions CMSIS/Core/Include/cmsis_armclang_ltm.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -498,9 +498,9 @@ __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
\param [in] val Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
Expand Down
6 changes: 3 additions & 3 deletions CMSIS/Core/Include/cmsis_gcc.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -629,9 +629,9 @@ __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
\param [in] val Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
Expand Down
6 changes: 3 additions & 3 deletions CMSIS/Core/Include/cmsis_tiarmclang_corem.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -551,9 +551,9 @@ __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
\param [in] val Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
Expand Down
2 changes: 1 addition & 1 deletion CMSIS/DoxyGen/Core/Core.dxy.in
View file
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ PROJECT_NAME = "CMSIS-Core (Cortex-M)"
# could be handy for archiving the generated documentation or if some version
# control system is used.

PROJECT_NUMBER = "Version 5.7.0"
PROJECT_NUMBER = "Version 6.0.0"

# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a
Expand Down
18 changes: 11 additions & 7 deletions CMSIS/DoxyGen/Core_A/Core_A.dxy.in
View file
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ PROJECT_NAME = "CMSIS-Core (Cortex-A)"
# could be handy for archiving the generated documentation or if some version
# control system is used.

PROJECT_NUMBER = "Version 1.2.1"
PROJECT_NUMBER = "Version 6.0.0"

# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a
Expand Down Expand Up @@ -920,18 +920,22 @@ INPUT = src/Overview.txt \
src/Using.txt \
src/Template.txt \
src/MISRA.txt \
../../Core_A/Include/core_ca.h \
../../Core_A/Include/cmsis_armcc.h \
../../Core_A/Include/cmsis_cp15.h \
../../Core_A/Source/irq_ctrl_gic.c \
../../Core_A/Include/irq_ctrl.h \
../../Core/Include/cmsis_version.h \
../../Core/Include/armv7a.h \
../../Core/Include/armv7a_cp15.h \
../../Core/Include/armv8a.h \
../../Core/Include/cmsis_armcc.h \
../../Core/Include/cmsis_armcc_corea.h \
../../Core/Include/gic_v20.h \
../../Core/Source/irq_ctrl_gic.c \
../../Core/Include/irq_ctrl.h \
src/Ref_SystemAndClock.txt \
src/ref_gic.txt \
src/ref_core_register.txt \
src/ref_cache.txt \
src/ref_timer.txt \
src/ref_mmu.txt \
src/core_ca.txt \
src/arm7a.txt \
src/cmsis_armcc.txt \
src/irq_ctrl.txt \

Expand Down
0 CMSIS/DoxyGen/Core_A/src/core_ca.txt → CMSIS/DoxyGen/Core_A/src/arm7a.txt
View file
File renamed without changes.

0 comments on commit ba9c5c3

Please sign in to comment.