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Update memory state machines to new architecture #197

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1 change: 1 addition & 0 deletions Cargo.lock

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8 changes: 4 additions & 4 deletions cli/src/commands/install_toolchain.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,10 +36,10 @@ impl InstallToolchainCmd {
if let Ok(entry) = entry {
let entry_path = entry.path();
let entry_name = entry_path.file_name().unwrap();
if entry_path.is_dir() &&
entry_name != "bin" &&
entry_name != "circuits" &&
entry_name != "toolchains"
if entry_path.is_dir()
&& entry_name != "bin"
&& entry_name != "circuits"
&& entry_name != "toolchains"
{
if let Err(err) = fs::remove_dir_all(&entry_path) {
println!("Failed to remove directory {:?}: {}", entry_path, err);
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6 changes: 3 additions & 3 deletions core/src/elf2rom.rs
Original file line number Diff line number Diff line change
Expand Up @@ -53,9 +53,9 @@ pub fn elf2rom(elf_file: String) -> Result<ZiskRom, Box<dyn Error>> {
// Add init data as a read/write memory section, initialized by code
// If the data is a writable memory section, add it to the ROM memory using Zisk
// copy instructions
if (section_header.sh_flags & SHF_WRITE as u64) != 0 &&
addr >= RAM_ADDR &&
addr + data.len() as u64 <= RAM_ADDR + RAM_SIZE
if (section_header.sh_flags & SHF_WRITE as u64) != 0
&& addr >= RAM_ADDR
&& addr + data.len() as u64 <= RAM_ADDR + RAM_SIZE
{
//println! {"elf2rom() new RW from={:x} length={:x}={}", addr, data.len(),
//data.len()};
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26 changes: 13 additions & 13 deletions core/src/zisk_inst.rs
Original file line number Diff line number Diff line change
Expand Up @@ -228,19 +228,19 @@ impl ZiskInst {
/// Constructs a `flags`` bitmap made of combinations of fields of the Zisk instruction. This
/// field is used by the PIL to proof some of the operations.
pub fn get_flags(&self) -> u64 {
let flags: u64 = 1 |
(((self.a_src == SRC_IMM) as u64) << 1) |
(((self.a_src == SRC_MEM) as u64) << 2) |
(((self.a_src == SRC_STEP) as u64) << 3) |
(((self.b_src == SRC_IMM) as u64) << 4) |
(((self.b_src == SRC_MEM) as u64) << 5) |
((self.is_external_op as u64) << 6) |
((self.store_ra as u64) << 7) |
(((self.store == STORE_MEM) as u64) << 8) |
(((self.store == STORE_IND) as u64) << 9) |
((self.set_pc as u64) << 10) |
((self.m32 as u64) << 11) |
(((self.b_src == SRC_IND) as u64) << 12);
let flags: u64 = 1
| (((self.a_src == SRC_IMM) as u64) << 1)
| (((self.a_src == SRC_MEM) as u64) << 2)
| (((self.a_src == SRC_STEP) as u64) << 3)
| (((self.b_src == SRC_IMM) as u64) << 4)
| (((self.b_src == SRC_MEM) as u64) << 5)
| ((self.is_external_op as u64) << 6)
| ((self.store_ra as u64) << 7)
| (((self.store == STORE_MEM) as u64) << 8)
| (((self.store == STORE_IND) as u64) << 9)
| ((self.set_pc as u64) << 10)
| ((self.m32 as u64) << 11)
| (((self.b_src == SRC_IND) as u64) << 12);

flags
}
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