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Merge remote-tracking branch 'origin/feature/registers_state' into in…
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…struction-observer
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xavi-pinsach committed Dec 10, 2024
2 parents 661e871 + 130f0c5 commit 0c4fdea
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Showing 10 changed files with 536 additions and 64 deletions.
2 changes: 2 additions & 0 deletions core/src/inst_context.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ pub struct InstContext {
pub pc: u64,
pub step: u64,
pub end: bool,
pub regs: [u64; 32],
}

/// RisK instruction context implementation
Expand All @@ -27,6 +28,7 @@ impl InstContext {
pc: ROM_ENTRY,
step: 0,
end: false,
regs: [0; 32],
}
}
pub fn to_text(&self) -> String {
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19 changes: 18 additions & 1 deletion core/src/mem.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
use crate::UART_ADDR;
use crate::{REG_FIRST, REG_LAST, UART_ADDR};

use crate::MemSection;

Expand Down Expand Up @@ -70,6 +70,8 @@ impl Mem {
/// Read a u64 value from the memory read sections, based on the provided address and width
#[inline(always)]
pub fn read(&self, addr: u64, width: u64) -> u64 {
debug_assert!(!Mem::address_is_register(addr));

// First try to read in the write section
if (addr >= self.write_section.start) && (addr <= (self.write_section.end - width)) {
// Calculate the read position
Expand Down Expand Up @@ -131,6 +133,8 @@ impl Mem {
/// Write a u64 value to the memory write section, based on the provided address and width
#[inline(always)]
pub fn write(&mut self, addr: u64, val: u64, width: u64) {
debug_assert!(!Mem::address_is_register(addr));

// Call write_silent to perform the real work
self.write_silent(addr, val, width);

Expand All @@ -143,6 +147,8 @@ impl Mem {
/// Write a u64 value to the memory write section, based on the provided address and width
#[inline(always)]
pub fn write_silent(&mut self, addr: u64, val: u64, width: u64) {
debug_assert!(!Mem::address_is_register(addr));

//println!("Mem::write() addr={:x}={} width={} value={:x}={}", addr, addr, width, val,
// val);

Expand Down Expand Up @@ -172,4 +178,15 @@ impl Mem {
_ => panic!("Mem::write_silent() invalid width={}", width),
}
}

#[inline(always)]
pub fn address_is_register(address: u64) -> bool {
((address & 0x7) == 0) && (REG_FIRST..=REG_LAST).contains(&address)
}

#[inline(always)]
pub fn address_to_register_index(address: u64) -> usize {
debug_assert!(Mem::address_is_register(address));
((address - REG_FIRST) >> 3) as usize
}
}
12 changes: 6 additions & 6 deletions core/src/zisk_inst.rs
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,7 @@ impl ZiskInst {
pub fn to_text(&self) -> String {
let mut s = String::new();
if self.paddr != 0 {
s += &(" paddr=".to_string() + &self.paddr.to_string());
s += &format!(" paddr=0x{:x}", self.paddr);
}
if self.store_ra {
s += &(" store_ra=".to_string() + &self.store_ra.to_string());
Expand All @@ -106,7 +106,7 @@ impl ZiskInst {
s += &format!(" store={}={}", self.store, store_to_str(self.store));
}
if self.store_offset != 0 {
s += &(" store_offset=".to_string() + &self.store_offset.to_string());
s += &format!(" store_offset=0x{:x}", self.store_offset);
}
if self.set_pc {
s += &(" set_pc=".to_string() + &self.set_pc.to_string());
Expand All @@ -129,19 +129,19 @@ impl ZiskInst {
s += &format!(" a_src={}={}", self.a_src, source_to_str(self.a_src));
}
if self.a_use_sp_imm1 != 0 {
s += &(" a_use_sp_imm1=".to_string() + &self.a_use_sp_imm1.to_string());
s += &format!(" a_use_sp_imm1=0x{:x}", self.a_use_sp_imm1);
}
if self.a_offset_imm0 != 0 {
s += &(" a_offset_imm0=".to_string() + &self.a_offset_imm0.to_string());
s += &format!(" a_offset_imm0=0x{:x}", self.a_offset_imm0);
}
if self.b_src != 0 {
s += &format!(" b_src={}={}", self.b_src, source_to_str(self.b_src));
}
if self.b_use_sp_imm1 != 0 {
s += &(" b_use_sp_imm1=".to_string() + &self.b_use_sp_imm1.to_string());
s += &format!(" b_use_sp_imm1=0x{:x}", self.b_use_sp_imm1);
}
if self.b_offset_imm0 != 0 {
s += &(" b_offset_imm0=".to_string() + &self.b_offset_imm0.to_string());
s += &format!(" b_offset_imm0=0x{:x}", self.b_offset_imm0);
}
if self.jmp_offset1 != 0 {
s += &(" jmp_offset1=".to_string() + &self.jmp_offset1.to_string());
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