Processor.yml

name: Processor

on:
  push:
    branches:
    - main
    paths:
    - 'rtl/**'
    - 'sw/**'
    - 'sim/**'
  pull_request:
    branches:
    - main
    paths:
    - 'rtl/**'
    - 'sw/**'
    - 'sim/**'
  workflow_dispatch:

jobs:

  Linux:
    runs-on: ubuntu-latest
    name: '🐧 Ubuntu | Shell script'

    steps:

    - name: '🧰 Repository Checkout'
      uses: actions/checkout@v4

    - name: '⚙️ Build Software Framework Tests'
      uses: docker://ghcr.io/stnolting/neorv32/sim
      with:
        args: ./do.py BuildAndInstallSoftwareFrameworkTests

    - name: '🚧 Run Processor Hardware Tests with shell script'
      uses: docker://ghcr.io/stnolting/neorv32/sim
      with:
        args: ./sim/simple/ghdl.sh


  VUnit-Container:
    runs-on: ubuntu-latest
    name: '🛳️ Container | VUnit'

    steps:

    - name: '🧰 Repository Checkout'
      uses: actions/checkout@v4

    - name: '⚙️ Build and install Processor Check software'
      uses: docker://ghcr.io/stnolting/neorv32/sim
      with:
        args: >-
          make -C sw/example/processor_check
          clean_all
          USER_FLAGS+=-DUART0_SIM_MODE
          USER_FLAGS+=-DSUPPRESS_OPTIONAL_UART_PRINT
          USER_FLAGS+=-flto
          MARCH=rv32imac_zicsr_zifencei
          info
          all

    - name: '📤 Archive Processor Check application image'
      uses: actions/upload-artifact@v3
      with:
        name: application
        path: rtl/core/neorv32_application_image.vhd

    - name: '🚧 Run Processor Hardware Tests with VUnit'
      uses: VUnit/vunit_action@master
      with:
        image: ghcr.io/stnolting/neorv32/sim
        cmd: ./sim/run.py --ci-mode -v