Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Sinara Poster #59

Open
6 tasks
dtcallcock opened this issue Oct 16, 2020 · 22 comments
Open
6 tasks

Sinara Poster #59

dtcallcock opened this issue Oct 16, 2020 · 22 comments

Comments

@dtcallcock
Copy link
Member

dtcallcock commented Oct 16, 2020

Final full resolution poster (dropbox) from IEEE International Conference on Quantum Computing and Engineering (QCE20).

Low resolution version (GitHub)

Creating an issue to track mistakes and additions as people spot them. Hopefully this poster can live on to go to other conferences and be a useful resource to give people new to Sinara until there is a real paper.

Things to fix for next time:

  • Add new crate shot with recent front panels and Kasli 2.0
  • Add new Artiq screenshot
  • Creotech and TechnoSytem logos aren't vectorized
  • Something happened in summary of Kasli: "Clock recovery and distribution" - last three letters are shifted
  • Kasli-SoC is a 'controller', not a 'carrier'
  • Add link to CERN DI/OT project
@dtcallcock
Copy link
Member Author

  • Who's logo should actually go on here? Presumably people who have funded/contributed some relevant hardware/gateware/software. Should we make it clear that that's why they are on there and this isn't just a list of people who bought crates. Is anyone missing (UW-Madison, the new Oxford Hub @cjbe, ...)?

@sbourdeauducq
Copy link
Member

sbourdeauducq commented Oct 17, 2020

Yes, the logos on the poster should be updated. https://m-labs.hk/experiment-control/funding/ would be a good reference.
MIT seems to have aggressive trademark lawyers and probably their logo should not be on the poster.

@dtcallcock
Copy link
Member Author

QCE21 poster deadline is Aug 2. Considering taking this again this year. Anyone else going?

@dtcallcock
Copy link
Member Author

EQTC deadline is also Aug 2. I will not attend as middle-of-the-night virtual conferences aren't my thing but could be a good opportunity to promote Sinara.

@dhslichter
Copy link
Member

I will probably attend virtual Quantum Week, would be game to help present a poster if desired.

@gkasprow
Copy link
Member

I will talk with my students :)

@gkasprow
Copy link
Member

OK, Dorota (our student) already submitted an abstract related to Sinara. Once she comes back from the holidays she will prepare the poster and consult it with the community.

@gkasprow
Copy link
Member

@sbourdeauducq

This comment has been minimized.

@dtcallcock
Copy link
Member Author

she will prepare the poster and consult it with the community.

Great! The poster linked above was made in Adobe Illustrator so she can load the pdf in that and edit or copy things from it should she want to.

@jordens
Copy link
Member

jordens commented Jul 22, 2021

I got contacted regarding a ARTIQ/Sinara talk at the "Advancing the performance of engineered trapped-ion quantum systems" workshop. I'd like some suggestions and nominations/volunteers for that.

@dhslichter
Copy link
Member

@jordens some of the ARTIQ day presenters, perhaps?

@DorotaNowicka
Copy link

Hi everyone! In agreement with Greg Kasprowicz, I submitted a poster about Sayma and Phaser to the QCE21: https://www.dropbox.com/s/8v5iy0ttmifsusk/posterQCE21v2.pdf?dl=0
The deadline for all updates is Sep 6.
I will be grateful for any comments and suggestions, especially please make sure that all authors are listed.

@gkasprow
Copy link
Member

gkasprow commented Aug 9, 2021

@DorotaNowicka we have much better photos of Sayma AWG. Please ask @marmeladapk about them.

@gkasprow

This comment has been minimized.

@dtcallcock
Copy link
Member Author

Thanks @DorotaNowicka. I made comments in Dropbox.

I think one thing that's missing is a brief higher-level discussion of why there are two SAWG cards. I think the form factor is a big part of it and is unclear on the poster at the moment. uTCA provides more board space, cooling, power, management, and data bandwidth, but comes with a big complexity and cost overhead.

@sbourdeauducq

This comment has been minimized.

@gkasprow

This comment has been minimized.

@gkasprow
Copy link
Member

I updated the wiki

@DorotaNowicka
Copy link

Thanks for the comments @dtcallcock . I made all the corrections (if I missed any, let me know, please!): https://www.dropbox.com/s/hs63bxkq5hq8opq/posterQCE21v3.pdf?dl=0
The only thing I haven't changed is JESB204B and JESD204B in Sayma clock generation block, now it's on a poster like on the Wiki page. Is it wrong?

@marmeladapk
Copy link
Member

@DorotaNowicka hey, I added some comments to the second version.

@gkasprow
Copy link
Member

gkasprow commented Oct 4, 2023

ECTI23 poster ECTI_DIOT_RC8.pdf

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

7 participants