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Fastino DIOT + HVAMP temperature stability estimate #126

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nkrackow opened this issue Aug 20, 2024 · 0 comments
Open

Fastino DIOT + HVAMP temperature stability estimate #126

nkrackow opened this issue Aug 20, 2024 · 0 comments

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@nkrackow
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nkrackow commented Aug 20, 2024

We were thinking about stability/repeatability of Fastino-DIOT and HVAMP V2 recently so I performed the following estimate for a worst case tempco of the full system:

device description tempco effective contribution to +-20 V outputs
LTC6655 main reference 2 ppm 80 uV
ADA4528 ref buffer offset compensation 15 nV 120 nV (aka negligible)
AD5542 DAC 0.05 ppm 2 uV
OPA2197 output amp/offset 2.5 uV 20 uV
OPA2197 output buffer 2.5 uV 5 uV
Vishay Y1747 output amp/offset resistors 0.5 ppm 20 uV
LT1028 HVAMP amp 1 uV 2 uV
Vishay NOMCA HVAMP resistors 5 ppm 200 uV

Adding them all up to get the worst case: 329 uV/°C or 8.2 ppm/°C

Assumptions:

  • LT3042 reference buffer is in loop with ADA4528 and therefore compensated
  • Used "tracking" (aka relative between in-package resistors) tempco for all Vishay resistor networks

Is there anything obviously wrong with my estimate? The real devices will likely be a lot better than the worst cases from the datasheets and might even cancel out if we're lucky.

The Vishay resistor network for HVAMP is the only SOIC-16 10K one I found. Is there a better one? That is obviously the biggest contributor to thermal instability on paper.

I cannot think of any hysteresis in the system which would lead to repeatability issues apart from thermal.

We would like to perform our own tests, ideally even with a thermal chamber some time in the future. I'll post the results once we can show them.

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