From ae01f6e601b1d25cb4a394cd32ec5212eb814073 Mon Sep 17 00:00:00 2001
From: rmsyn <rmsynchls@gmail.com>
Date: Sun, 5 May 2024 20:58:57 +0000
Subject: [PATCH] riscv-rt: build: use cfg-check directives in build script

Uses new lint checks for `cfg` variables.

Requires bumping the MSRV to `1.77.0`.
---
 riscv-rt/Cargo.toml | 2 +-
 riscv-rt/build.rs   | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/riscv-rt/Cargo.toml b/riscv-rt/Cargo.toml
index 1c33bea1..f96fa54b 100644
--- a/riscv-rt/Cargo.toml
+++ b/riscv-rt/Cargo.toml
@@ -1,7 +1,7 @@
 [package]
 name = "riscv-rt"
 version = "0.13.0"
-rust-version = "1.60"
+rust-version = "1.77.0"
 repository = "https://github.com/rust-embedded/riscv"
 authors = ["The RISC-V Team <risc-v@teams.rust-embedded.org>"]
 categories = ["embedded", "no-std"]
diff --git a/riscv-rt/build.rs b/riscv-rt/build.rs
index fa405808..0f3aa89f 100644
--- a/riscv-rt/build.rs
+++ b/riscv-rt/build.rs
@@ -72,6 +72,8 @@ fn parse_target(target: &str, cargo_flags: &str) -> (u32, HashSet<char>) {
 }
 
 fn main() {
+    println!("cargo::rustc-check-cfg=cfg(riscv)");
+
     let target = env::var("TARGET").unwrap();
     let cargo_flags = env::var("CARGO_ENCODED_RUSTFLAGS").unwrap();
     let _name = env::var("CARGO_PKG_NAME").unwrap();
@@ -87,10 +89,12 @@ fn main() {
         // generate the linker script and expose the ISA width
         let arch_width = match bits {
             32 => {
+                println!("cargo::rustc-check-cfg=cfg(riscv32)");
                 println!("cargo:rustc-cfg=riscv32");
                 4
             }
             64 => {
+                println!("cargo::rustc-check-cfg=cfg(riscv64)");
                 println!("cargo:rustc-cfg=riscv64");
                 8
             }
@@ -100,6 +104,7 @@ fn main() {
 
         // expose the ISA extensions
         for ext in &extensions {
+            println!("cargo::rustc-check-cfg=cfg(riscv{ext})");
             println!("cargo:rustc-cfg=riscv{}", ext);
         }
     }