From 455516f0fa2b4f3251e32666e616a033da3befb1 Mon Sep 17 00:00:00 2001 From: Andrew Scheller Date: Tue, 16 Mar 2021 13:58:19 +0000 Subject: [PATCH] A ROSC DIV of 0 is okay (and sets DIV = 32) Writing ROSC DIV incorrectly sets BADWRITE, so avoid rosc_write and manually clear the BADWRITE bit --- src/rp2_common/hardware_rosc/rosc.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/rp2_common/hardware_rosc/rosc.c b/src/rp2_common/hardware_rosc/rosc.c index 69b6012..2cf970f 100644 --- a/src/rp2_common/hardware_rosc/rosc.c +++ b/src/rp2_common/hardware_rosc/rosc.c @@ -30,8 +30,13 @@ uint rosc_find_freq(uint32_t low_mhz, uint32_t high_mhz) { } void rosc_set_div(uint32_t div) { - assert(div <= 31 && div >= 1); - rosc_write(&rosc_hw->div, ROSC_DIV_VALUE_PASS + div); + assert(div <= 31); + rosc_clear_bad_write(); + assert(rosc_write_okay()); + // don't use rosc_write here because setting a valid DIV is incorrectly flagged as a bad write + rosc_hw->div = ROSC_DIV_VALUE_PASS + div; + rosc_clear_bad_write(); + assert(rosc_write_okay()); } void rosc_set_freq(uint32_t code) { @@ -58,4 +63,4 @@ void rosc_set_dormant(void) { rosc_write(&rosc_hw->dormant, ROSC_DORMANT_VALUE_DORMANT); // Wait for it to become stable once woken up while(!(rosc_hw->status & ROSC_STATUS_STABLE_BITS)); -} \ No newline at end of file +}