bitwise operations for classically conditioned gates #6434

ikd-sci · 2024-01-31T00:46:08Z

Is your feature request related to a use case or problem? Please describe.

The main use case is conditional circuits, however, this might be more broadly applicable as the task of splitting bits and doing bitwise operations is fairly common.

Describe the solution you'd like

There is a long-standing issue of limited out-of-the-box support of bitwise operations in sympy
sympy/sympy#5353
Currently, cirq doesn't provide ways to split integer register into individual bits in order to use those bits for classically conditioned operations. The typical example of such operations includes pairwise XOR (as in constant-depth feedforward protocols).

[optional] Describe alternatives/workarounds you've considered

Current workaround consists in creating individual bit registers for every single readout operation (LSB or MSB representation) and then performing pairwise sympy.Xor on those bits:

q01 ^ q03 ^ q05 ^ q07 ^ q09...

Another approach consist in calculating a truth table. Example:

sympy.Eq(a, 64) | sympy.Eq(a, 63) | sympy.Eq(a, 62) | ...

Both approaches work and are correctly simulated.

Yet another way consists in bit shifting as the following is technically allowed by SymPy:

(sympy.Integer(0b1000) >> 2) & (sympy.Interger(0b1011) >> 1)

[optional] Additional context (e.g. screenshots)
The approach of adding bit registers doesn't scale gracefully even for a small system size:

Even though it does encode the correct circuit -- there is a lot of notation clutter in ASCII representation and suboptimal to work with due the growing number of sympy operations.

What is the urgency from your perspective for this issue? Is it blocking important work?
P1 - I need this no later than the next release (end of quarter)

The text was updated successfully, but these errors were encountered:

NoureldinYosri · 2024-01-31T01:50:51Z

@ikd-sci is this for simulation or for circuit diagrams. for simulation we have the abstract class cirq.ops.AbstractControlValues which can be extended to represent any control function and used in simulation.

daxfohl · 2024-02-01T06:29:09Z

Classical controls don't currently work with AbstractControlValues, though I don't think it would be hard to add a subclass of Condition that contains an AbstractControlValues and a Seq[MeasurementKey].

The easiest option here though would be to add a bitmask field to KeyCondition and update the resolve there to handle it. This seems like a nice thing to have regardless, as it creates parity with the bitmask in MeasurementGate. The only additional change you'd have to make outside of the KeyCondition class is I think you'd have to update the code at

Cirq/cirq-core/cirq/ops/classically_controlled_operation.py

Line 164 in 2ef1909

not isinstance(c, value.KeyCondition) for c in self._conditions

to show any bitmasks nicely in the circuit diagram. But everything simulation related, and the deferred_measurements_transformer should just work, as they just call into resolve (though it doesn't hurt to check).

github-actions · 2024-04-04T00:22:29Z