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generating chips, manuals, and code #19

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orangecms opened this issue Mar 24, 2024 · 1 comment
Open

generating chips, manuals, and code #19

orangecms opened this issue Mar 24, 2024 · 1 comment

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@orangecms
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orangecms commented Mar 24, 2024

The following are closely related:

  • SoC design, peripheral integration
  • processor reference manual
  • device drivers
  • platform init / boot flow

Given a declarative language for modeling an SoC, it should also translate into the machine-readable CMSIS SVD format. from which code can already be generated, such as via svd2rust. At the same time, a device tree could be derived from the same source, and then operating systems and applications built on top of everything. SiFive have even created a reverse generator that takes a device tree and outputs SVD, given knowledge on the peripherals and the DT. In a similar fashion, ACPI tables and methods could be created, especially in the form of ACPI lite.

Can we find such transformations, and build a proof of concept? The open specification ISA RISC-V makes a suitable environment for a proof of concept, especially considering that many open SoCs based on it already exist.

Notes

  • Zephyr generates full code from Device Trees and config
  • OpenAMP project has the concept of a System Device Tree

See also:

@orangecms
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related: #14

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