The rng(random number generator) IP is a fully parameterised soft IP to generate the pseudo random number. The IP features an APB4 slave interface, fully compliant with the AMBA APB Protocol Specification v2.0.
This IP use the 32-bit Galois LSFR with maximum length(feedback polynomial: 32'hE000_0200). After writing the non-zero value to the seed register, rng can generate one valid 32-bit random number in every rising edge of apb clock.
- Internal 32-bit LSFR implemented with max sequence
- 32-bit programmable seed register
- Generate one random number per cycle
- Static synchronous design
- Full synthesizable
| port name | type | description |
|---|---|---|
| apb4 | interface | apb4 slave interface |
| name | offset | length | description |
|---|---|---|---|
| CTRL | 0x0 | 4 | control register |
| SEED | 0x4 | 4 | seed register |
| VAL | 0x8 | 4 | value register |
| bit | access | description |
|---|---|---|
[31:1] |
none | reserved |
[0:0] |
RW | EN |
reset value: 0x0000_0000
- EN: the enable signal for seed register writing operation.
EN = 1'b0: writing seed register disabledEN = 1'b1: writing seed register enabled
| bit | access | description |
|---|---|---|
[31:0] |
W | SEED |
reset value: 0x0000_0000
- SEED: the 32-bit initial random seed value.
| bit | access | description |
|---|---|---|
[31:0] |
R | VAL |
reset value: 0x0000_0000
- VAL: the 32-bit generated random number.
The software operation of rng is simple. These registers can be accessed by 4-byte aligned read and write. All operation can be split into initialization and read operation. C-like pseudocode for the initialization operation:
rng.CTRL.EN = 1 // enable the seed register writing
rng.SEED = SEED_32_bit // write seed valueread operation:
uint32_t val = rng.VAL // get the random numberIf wanting to stop generating valid random numbers, software need to set the value of seed register to zero:
rng.SEED = 0x0complete driver and test codes in driver dir.