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top.twr
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top.twr
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--------------------------------------------------------------------------------
Release 14.7 Trace (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 4
-n 3 -fastpaths -xml top.twx top.ncd -o top.twr top.pcf -ucf pins.ucf
Design file: top.ncd
Physical constraint file: top.pcf
Device,package,speed: xc3s400,pq208,-4 (PRODUCTION 1.39 2013-10-13)
Report level: verbose report
Environment Variable Effect
-------------------- ------
NONE No environment variables were set
--------------------------------------------------------------------------------
INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
option. All paths that are not constrained will be reported in the
unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on
a 50 Ohm transmission line loading model. For the details of this model,
and for more information on accounting for different loading conditions,
please see the device datasheet.
INFO:Timing:3390 - This architecture does not support a default System Jitter
value, please add SYSTEM_JITTER constraint to the UCF to modify the Clock
Uncertainty calculation.
INFO:Timing:3389 - This architecture does not support 'Discrete Jitter' and
'Phase Error' calculations, these terms will be zero in the Clock
Uncertainty calculation. Please make appropriate modification to
SYSTEM_JITTER to account for the unsupported Discrete Jitter and Phase
Error.
Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)
Setup/Hold to clock CLK_20M
------------+------------+------------+------------------+--------+
|Max Setup to|Max Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
------------+------------+------------+------------------+--------+
column<0> | 5.570(R)| 0.123(R)|CLK_20M_BUFGP | 0.000|
column<1> | 5.662(R)| -0.095(R)|CLK_20M_BUFGP | 0.000|
column<2> | 5.968(R)| 0.005(R)|CLK_20M_BUFGP | 0.000|
column<3> | 6.102(R)| 0.121(R)|CLK_20M_BUFGP | 0.000|
------------+------------+------------+------------------+--------+
Clock CLK_20M to Pad
-----------------+------------+------------------+--------+
| clk (edge) | | Clock |
Destination | to PAD |Internal Clock(s) | Phase |
-----------------+------------+------------------+--------+
DOTMATRIX_CLK | 10.343(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_DATA_IN| 7.382(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<1> | 11.396(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<2> | 11.782(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<3> | 11.964(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<4> | 11.664(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<5> | 10.983(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<6> | 12.257(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<7> | 11.654(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<8> | 12.811(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<9> | 11.535(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<10> | 11.299(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<11> | 11.727(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<12> | 11.035(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<13> | 11.536(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<14> | 10.901(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<15> | 10.967(R)|CLK_20M_BUFGP | 0.000|
DOTMATRIX_R<16> | 11.044(R)|CLK_20M_BUFGP | 0.000|
row<0> | 9.542(R)|CLK_20M_BUFGP | 0.000|
row<1> | 8.515(R)|CLK_20M_BUFGP | 0.000|
row<2> | 8.862(R)|CLK_20M_BUFGP | 0.000|
row<3> | 9.192(R)|CLK_20M_BUFGP | 0.000|
-----------------+------------+------------------+--------+
Clock to Setup on destination clock CLK_20M
---------------+---------+---------+---------+---------+
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
CLK_20M | 6.381| | | |
---------------+---------+---------+---------+---------+
Analysis completed Sat Nov 16 11:52:18 2019
--------------------------------------------------------------------------------
Trace Settings:
-------------------------
Trace Settings
Peak Memory Usage: 4492 MB