From 2468e61421c56c8eef5f508425175e0d17715fb5 Mon Sep 17 00:00:00 2001 From: Gan Shen Date: Tue, 14 May 2024 22:09:35 -0700 Subject: [PATCH] Update Zach's talk info --- content/lsd-seminar/2024sp.md | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/content/lsd-seminar/2024sp.md b/content/lsd-seminar/2024sp.md index 2734895..53912dd 100644 --- a/content/lsd-seminar/2024sp.md +++ b/content/lsd-seminar/2024sp.md @@ -25,7 +25,7 @@ Talks will be advertised on the [ucsc-lsd-seminar-announce](https://groups.googl | [April 26](#april-26) | Jennifer Switzer | Hardware Repurposing to Reduce the Embodied Carbon of Computing | | [May 3](#may-3) | Julian Haas | LoRe: Reasoning about Safety and Consistency in Local-First Software | | [May 10](#may-10) | Robin Brown | WebAssembly Components: The Modular Polyglot Ecosystem We Need | -| May 17 | _TBD_ | _TBD_ | +| [May 17](#may-17) | Zach Sisco | Hardware Decompilation: Recovering Abstraction in Digital Circuits| | May 24 | Guannan Wei | _TBD_ | | May 31 | _TBD_ | _TBD_ | | June 7 | _TBD_ | _TBD_ | @@ -136,6 +136,16 @@ In this talk, I will [Wow]: https://github.com/esoterra/wow [Claw]: https://github.com/esoterra/claw-lang +## May 17 + +**Speaker:** Zach Sisco + +**Title:** Hardware Decompilation: Recovering Abstraction in Digital Circuits + +**Abstract:** My research introduces the problem of "hardware decompilation". Analogous to software decompilation, hardware decompilation is about analyzing a low-level artifact---in this case a netlist, i.e., a graph of wires and logical gates representing a digital circuit---in order to recover higher-level programming abstractions, and using those abstractions to generate code written in a hardware description language (HDL). The overall problem of hardware decompilation requires a number of pieces. In my initial paper, published at PLDI 2023, I focus on one specific piece of the puzzle: a technique called "hardware loop rerolling". Hardware loop rerolling leverages clone detection and program synthesis techniques to identify repeated logic in netlists (such as would be synthesized from loops in the original HDL code) and reroll them into syntactic loops in the recovered HDL code. In this talk, I will introduce what hardware decompilation is, and why you would want to use a hardware decompiler. Then, I will describe my solution to the hardware loop rerolling problem, and give a preview of in-progress work tackling more aspects of hardware decompilation. + +**Bio:** Zach Sisco is a PhD candidate at UC Santa Barbara. He is advised by Professors Jonathan Balkind and Ben Hardekopf. Zach's research is about applying solver-aided programming techniques to problems in hardware design. His website is: https://zsisco.github.io/ + --- [Archive](../)