From c4fb0a84fe8ba962c5a4c8b5b75e70e2055474a2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Simon=20Sch=C3=B6ning?= <simon.schoening@rwth-aachen.de>
Date: Thu, 20 Jul 2023 12:30:26 +0200
Subject: [PATCH] Add riscv64 support
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Co-authored-by: Martin Kröning <martin.kroening@eonerc.rwth-aachen.de>
Signed-off-by: Martin Kröning <martin.kroening@eonerc.rwth-aachen.de>
---
 benches/micro/Cargo.toml         | 3 +++
 benches/micro/src/benches/mod.rs | 6 ++++++
 2 files changed, 9 insertions(+)

diff --git a/benches/micro/Cargo.toml b/benches/micro/Cargo.toml
index 5ce7e1afd..21d1d3e36 100644
--- a/benches/micro/Cargo.toml
+++ b/benches/micro/Cargo.toml
@@ -15,6 +15,9 @@ default-features = false
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 aarch64 = { version = "0.0.10", default-features = false }
 
+[target.'cfg(target_arch = "riscv64")'.dependencies]
+riscv = "0.10"
+
 [target.'cfg(target_os = "linux")'.dependencies]
 syscalls = { version = "0.6", default-features = false }
 
diff --git a/benches/micro/src/benches/mod.rs b/benches/micro/src/benches/mod.rs
index 63890980c..5606f2ca1 100644
--- a/benches/micro/src/benches/mod.rs
+++ b/benches/micro/src/benches/mod.rs
@@ -37,6 +37,12 @@ fn get_timestamp() -> u64 {
 	CNTPCT_EL0.get()
 }
 
+#[cfg(target_arch = "riscv64")]
+#[inline]
+fn get_timestamp() -> u64 {
+	riscv::register::time::read64()
+}
+
 extern "C" {
 	#[cfg(target_os = "hermit")]
 	fn sys_getpid() -> u32;