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2.7_gerber_files_etc.md

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Gerber files, prints and other I/O issues

Is is possible to produce output without GUI intervention?

Yes, you can tell pcb on the command line to do an export. All the parameters set in the print dialog can be used in the command line too.

Some simple examples:

Gerber files:

pcb -x gerber --gerberfile BOARD BOARD.pcb

Encapsulated Postscript:

pcb -x eps --eps-file BOARD.eps

Multi page formated Postscript print:

pcb -x ps --psfile BOARD.ps BOARD.pcb

PNG format:

pcb -x png --dpi 300 --only-visible --outfile BOARD.png BOARD.pcb

Different output procedures allow for different options. See the output of pcb --help for details.

How can I print specific layers only?

In the GUI:

  • deactivate all layers you don't want to print
  • choose File → Export layout… → eps
  • check as-shown

From the command line:

pcb -x eps \
  --layer-stack "outline,top,silk" \
  --as-shown \
  --eps-file "foobar.eps" BOARD.pcb

The layer-stack string can contain a comma separated list of the layers used in the GUI. You have to give the option “--as-shown”. Else, a default layer stack file will be used. In addition there are a number of tokens that are technically no layers like “pins”, or “invisible”. If you put an unknown token in the layer-stack string, pcb responds with a list of known layer names.

##How can I print the bottom side of the board?

From the command line: Add “solderside” to the layer-stack string of the print command.

Example:

  pcb -x eps --layer-stack "silk,solderside" \
     --as-shown \
     --eps-file "/tmp/foobar.eps" BOARD.pcb

How do I make a board outline to go with my gerbers to the board maker?

PCB interprets the lines in a layer called ‘outline’ as the absolute edge of the pcb. If no such layer is present, you can either rename a layer ((b>Edit → Edit name of → active layer). Or you can add a layer from scratch (File → Preferences… → Layers → Add) and rename it accordingly.

Note, that the name of this layer is case sensitive.

You can enter your outline thru PCB’s GUI. You just draw the desired outline with the line tool or the arc too. Most fabs will cut the board at the center of the lines. You can generate boards of any shape this way. Arcs, polygons and text in the outline layer also enter the gerber file.

It’s also possible to edit the native .pcb file format of your layout.

I usually use layer 8 for outlines:

Layer(8 "outline")
(
	Line[x1 y1 x2 y2 1000 2000 0x00000000]
	Line[x2 y2 x3 y3 1000 2000 0x00000000]
	Line[x3 y3 x4 y4 1000 2000 0x00000000]
	Line[x4 y4 x1 y1 1000 2000 0x00000000]
	Line[<more points go here for non-square boards> 1000 2000 0x00000000]
)

PCB will produce a gerber file called $NAME.outline.gbr that exclusively contains the objects in the outline layer.

How do I make sure, that the design contains only certain hole sizes?

Some fabs provide lists of standard drill sizes and charge extra if the design contains additional sizes. You can put this list in a “vendor resource file”. This file may also exceptions and specify if the nearest diameter should be chosen, or rounded up to the next size in the list. See the section Vendor-drill-mapping in the pcb manual for the syntax of this file.

Load the file to pcb with File → Load vendor resource file. Alternatively, you can use with the command:

:LoadVendor(drillfile)

Substitute “drillfile” with the name of your file.

On load, pcb will substitute drill sizes so that the layout conforms to the list. If you want to apply an already loaded vendor resource file again, you can do Apply vendor drill mapping from the Connects menu.

How many pads are in my layout?

Some board houses ask for the number of SMD pads to help them with their quote. You can use gerbv to extract this pad count from your layout.

  1. export the layout to gerbers
  2. open the file $NAME.frontpaste.gbr with gerbv
  3. choose Gerber codes report from the Analyze menu
  4. The tab “Aperture usage” gives the number of SMD pads.

I'm done with my layout. How should I check my design?

  • Run a check of design rules either through the command interface (“DRC()”) or from the menu (Connects → Design Rule Checker). You can set the rules in the Sizes section of the Preferences… dialog. Results of the check are shown in the log window.

Besides running the DRC checker, it is essential to check your Gerber files. The gEDA Suite includes the program “gerbv” for this task. Here are some things to check/verify:

  • Check that all trace widths are the correct size. Also make sure your trace widths and metal-metal separations are above the minimum specified by your PCB vendor.
  • Check that all hole diameters are called out at the correct size.
  • Check that metal annular rings around holes/vias are large enough. The annular ring is the distance between the hole’s edge and the outer diameter of the metallization. The annular ring must be large enough to accommodate drill location + layer registration + other manufacturing inaccuracy. This information should be available from your PCB fabrication house; they normally publish the minimum annular ring requirements in their manufacturing rules document.
  • Check that your antipads (clearance around holes/vias) are large enough. This information should be available from your PCB fabrication house; ask them for their manufacturing rules document.
  • Verify that no soldermask or silkscreen overlays a copper pad or through-hole.
  • On plane layers, verify that at least some vias connect to it (yes, I have seen a board where the entire ground plane was floating – not done in pcb btw)
  • On plane layers, verify that at least some vias don’t connect to it.
  • Do a visual sanity check of all layers. Nothing detailed, just does it look approximately like you think it should.
  • Sign it and date it. At least put a version number on it, so if you have to rev the board, you can tell the good from the bad.
  • Are all layers negative/positive as they should be? Note that some fab houses want positive layers only. PCB will automatically create negative Gerbers on outer layer planes with no tracks. If you want an all-plane layer to be output as a positive layer, draw a single track somewhere in an unused part of the plane. This will trigger PCB to render that layer as a positive layer.