main.p1

Version 3.2 HI-TECH Software Intermediate Code
[p mainexit ]
"199 system/usb_device.h
[v _USBDeviceInit `(v ~T0 @X0 0 ef ]
"3626 D:\ProgramFiles\Microchip\xc8\v2.32\pic\include\proc\pic18f4550.h
[v _TRISB `Vuc ~T0 @X0 0 e@3987 ]
"65 system/system.h
[v _SYS_state `uc ~T0 @X0 0 e@0 ]
"3080 D:\ProgramFiles\Microchip\xc8\v2.32\pic\include\proc\pic18f4550.h
[s S125 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S125 . LATB0 LATB1 LATB2 LATB3 LATB4 LATB5 LATB6 LATB7 ]
"3090
[s S126 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S126 . LB0 LB1 LB2 LB3 LB4 LB5 LB6 LB7 ]
"3079
[u S124 `S125 1 `S126 1 ]
[n S124 . . . ]
"3101
[v _LATBbits `VS124 ~T0 @X0 0 e@3978 ]
"66 system/system.h
[v _PT0_BOOT `uc ~T0 @X0 0 e@1 ]
"78
[v _TMR0_1S_config `(v ~T0 @X0 0 ef ]
"8589 D:\ProgramFiles\Microchip\xc8\v2.32\pic\include\proc\pic18f4550.h
[s S355 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S355 . RBIF INT0IF TMR0IF RBIE INT0IE TMR0IE PEIE_GIEL GIE_GIEH ]
"8599
[s S356 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S356 . . INT0F T0IF . INT0E T0IE PEIE GIE ]
"8609
[s S357 :6 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S357 . . GIEL GIEH ]
"8588
[u S354 `S355 1 `S356 1 `S357 1 ]
[n S354 . . . . ]
"8615
[v _INTCONbits `VS354 ~T0 @X0 0 e@4082 ]
"8070
[v _T0CON `Vuc ~T0 @X0 0 e@4053 ]
"303 system/usb_device.h
[v _USBDeviceTasks `(v ~T0 @X0 0 ef ]
"89 main.c
[c E3311 0 1 2 4 8 16 32 .. ]
[n E3311 . DETACHED_STATE ATTACHED_STATE POWERED_STATE DEFAULT_STATE ADR_PENDING_STATE ADDRESS_STATE CONFIGURED_STATE  ]
"2050 system/usb_device.h
[v _USBDeviceState `E3311 ~T0 @X0 0 e ]
"655 D:\ProgramFiles\Microchip\xc8\v2.32\pic\include\proc\pic18f4550.h
[s S31 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S31 . . SUSPND RESUME USBEN PKTDIS SE0 PPBRST ]
"654
[u S30 `S31 1 ]
[n S30 . . ]
"665
[v _UCONbits `VS30 ~T0 @X0 0 e@3949 ]
"448 system/usb_device.h
[v _USBTransferOnePacket `(*v ~T0 @X0 0 ef4`uc`uc`*uc`uc ]
"51 system/system.h
[v _ReceivedDataBuffer `uc ~T0 @X0 -> 0 `x e@1280 ]
[v F3706 `(v ~T0 @X0 1 tf ]
"58 main.c
[v _boot `TF3706 ~T0 @X0 0 e ]
"57
[v _init_APP `(v ~T0 @X0 0 ef ]
"3074 D:\ProgramFiles\Microchip\xc8\v2.32\pic\include\proc\pic18f4550.h
[v _LATB `Vuc ~T0 @X0 0 e@3978 ]
[v F3689 `(v ~T0 @X0 1 tf2`uc`uc ]
"80 system/system.h
[v _response_event `TF3689 ~T0 @X0 0 e ]
[v F3679 `(v ~T0 @X0 1 tf ]
"76
[v _HID_rx `TF3679 ~T0 @X0 0 e ]
[v F3709 `(v ~T0 @X0 1 tf ]
"60 main.c
[v _Write_event `TF3709 ~T0 @X0 0 e ]
"13 system/memory.h
[v _erase_falsh `(v ~T0 @X0 0 ef ]
[v F3712 `(v ~T0 @X0 1 tf ]
"61 main.c
[v _Read_event `TF3712 ~T0 @X0 0 e ]
"2454 D:\ProgramFiles\Microchip\xc8\v2.32\pic\include\proc\pic18f4550.h
[v _PORTB `Vuc ~T0 @X0 0 e@3969 ]
"10 system/memory.h
[v _flash_write_B32 `(uc ~T0 @X0 0 ef ]
"11
[v _flash_read_byte `(v ~T0 @X0 0 ef ]
"55 D:\ProgramFiles\Microchip\xc8\v2.32\pic\include\proc\pic18f4550.h
[; <" SPPDATA equ 0F62h ;# ">
"75
[; <" SPPCFG equ 0F63h ;# ">
"152
[; <" SPPEPS equ 0F64h ;# ">
"226
[; <" SPPCON equ 0F65h ;# ">
"252
[; <" UFRM equ 0F66h ;# ">
"259
[; <" UFRML equ 0F66h ;# ">
"337
[; <" UFRMH equ 0F67h ;# ">
"377
[; <" UIR equ 0F68h ;# ">
"433
[; <" UIE equ 0F69h ;# ">
"489
[; <" UEIR equ 0F6Ah ;# ">
"540
[; <" UEIE equ 0F6Bh ;# ">
"591
[; <" USTAT equ 0F6Ch ;# ">
"651
[; <" UCON equ 0F6Dh ;# ">
"702
[; <" UADDR equ 0F6Eh ;# ">
"766
[; <" UCFG equ 0F6Fh ;# ">
"845
[; <" UEP0 equ 0F70h ;# ">
"953
[; <" UEP1 equ 0F71h ;# ">
"1061
[; <" UEP2 equ 0F72h ;# ">
"1169
[; <" UEP3 equ 0F73h ;# ">
"1277
[; <" UEP4 equ 0F74h ;# ">
"1385
[; <" UEP5 equ 0F75h ;# ">
"1493
[; <" UEP6 equ 0F76h ;# ">
"1601
[; <" UEP7 equ 0F77h ;# ">
"1709
[; <" UEP8 equ 0F78h ;# ">
"1785
[; <" UEP9 equ 0F79h ;# ">
"1861
[; <" UEP10 equ 0F7Ah ;# ">
"1937
[; <" UEP11 equ 0F7Bh ;# ">
"2013
[; <" UEP12 equ 0F7Ch ;# ">
"2089
[; <" UEP13 equ 0F7Dh ;# ">
"2165
[; <" UEP14 equ 0F7Eh ;# ">
"2241
[; <" UEP15 equ 0F7Fh ;# ">
"2317
[; <" PORTA equ 0F80h ;# ">
"2456
[; <" PORTB equ 0F81h ;# ">
"2566
[; <" PORTC equ 0F82h ;# ">
"2708
[; <" PORTD equ 0F83h ;# ">
"2829
[; <" PORTE equ 0F84h ;# ">
"2976
[; <" LATA equ 0F89h ;# ">
"3076
[; <" LATB equ 0F8Ah ;# ">
"3188
[; <" LATC equ 0F8Bh ;# ">
"3266
[; <" LATD equ 0F8Ch ;# ">
"3378
[; <" LATE equ 0F8Dh ;# ">
"3430
[; <" TRISA equ 0F92h ;# ">
"3435
[; <" DDRA equ 0F92h ;# ">
"3628
[; <" TRISB equ 0F93h ;# ">
"3633
[; <" DDRB equ 0F93h ;# ">
"3850
[; <" TRISC equ 0F94h ;# ">
"3855
[; <" DDRC equ 0F94h ;# ">
"4004
[; <" TRISD equ 0F95h ;# ">
"4009
[; <" DDRD equ 0F95h ;# ">
"4226
[; <" TRISE equ 0F96h ;# ">
"4231
[; <" DDRE equ 0F96h ;# ">
"4328
[; <" OSCTUNE equ 0F9Bh ;# ">
"4387
[; <" PIE1 equ 0F9Dh ;# ">
"4471
[; <" PIR1 equ 0F9Eh ;# ">
"4555
[; <" IPR1 equ 0F9Fh ;# ">
"4639
[; <" PIE2 equ 0FA0h ;# ">
"4710
[; <" PIR2 equ 0FA1h ;# ">
"4781
[; <" IPR2 equ 0FA2h ;# ">
"4852
[; <" EECON1 equ 0FA6h ;# ">
"4918
[; <" EECON2 equ 0FA7h ;# ">
"4925
[; <" EEDATA equ 0FA8h ;# ">
"4932
[; <" EEADR equ 0FA9h ;# ">
"4939
[; <" RCSTA equ 0FABh ;# ">
"4944
[; <" RCSTA1 equ 0FABh ;# ">
"5149
[; <" TXSTA equ 0FACh ;# ">
"5154
[; <" TXSTA1 equ 0FACh ;# ">
"5405
[; <" TXREG equ 0FADh ;# ">
"5410
[; <" TXREG1 equ 0FADh ;# ">
"5417
[; <" RCREG equ 0FAEh ;# ">
"5422
[; <" RCREG1 equ 0FAEh ;# ">
"5429
[; <" SPBRG equ 0FAFh ;# ">
"5434
[; <" SPBRG1 equ 0FAFh ;# ">
"5441
[; <" SPBRGH equ 0FB0h ;# ">
"5448
[; <" T3CON equ 0FB1h ;# ">
"5569
[; <" TMR3 equ 0FB2h ;# ">
"5576
[; <" TMR3L equ 0FB2h ;# ">
"5583
[; <" TMR3H equ 0FB3h ;# ">
"5590
[; <" CMCON equ 0FB4h ;# ">
"5680
[; <" CVRCON equ 0FB5h ;# ">
"5765
[; <" ECCP1AS equ 0FB6h ;# ">
"5770
[; <" CCP1AS equ 0FB6h ;# ">
"5927
[; <" ECCP1DEL equ 0FB7h ;# ">
"5932
[; <" CCP1DEL equ 0FB7h ;# ">
"6065
[; <" BAUDCON equ 0FB8h ;# ">
"6070
[; <" BAUDCTL equ 0FB8h ;# ">
"6245
[; <" CCP2CON equ 0FBAh ;# ">
"6309
[; <" CCPR2 equ 0FBBh ;# ">
"6316
[; <" CCPR2L equ 0FBBh ;# ">
"6323
[; <" CCPR2H equ 0FBCh ;# ">
"6330
[; <" CCP1CON equ 0FBDh ;# ">
"6335
[; <" ECCP1CON equ 0FBDh ;# ">
"6492
[; <" CCPR1 equ 0FBEh ;# ">
"6499
[; <" CCPR1L equ 0FBEh ;# ">
"6506
[; <" CCPR1H equ 0FBFh ;# ">
"6513
[; <" ADCON2 equ 0FC0h ;# ">
"6584
[; <" ADCON1 equ 0FC1h ;# ">
"6669
[; <" ADCON0 equ 0FC2h ;# ">
"6788
[; <" ADRES equ 0FC3h ;# ">
"6795
[; <" ADRESL equ 0FC3h ;# ">
"6802
[; <" ADRESH equ 0FC4h ;# ">
"6809
[; <" SSPCON2 equ 0FC5h ;# ">
"6871
[; <" SSPCON1 equ 0FC6h ;# ">
"6941
[; <" SSPSTAT equ 0FC7h ;# ">
"7189
[; <" SSPADD equ 0FC8h ;# ">
"7196
[; <" SSPBUF equ 0FC9h ;# ">
"7203
[; <" T2CON equ 0FCAh ;# ">
"7301
[; <" PR2 equ 0FCBh ;# ">
"7306
[; <" MEMCON equ 0FCBh ;# ">
"7411
[; <" TMR2 equ 0FCCh ;# ">
"7418
[; <" T1CON equ 0FCDh ;# ">
"7521
[; <" TMR1 equ 0FCEh ;# ">
"7528
[; <" TMR1L equ 0FCEh ;# ">
"7535
[; <" TMR1H equ 0FCFh ;# ">
"7542
[; <" RCON equ 0FD0h ;# ">
"7691
[; <" WDTCON equ 0FD1h ;# ">
"7719
[; <" HLVDCON equ 0FD2h ;# ">
"7724
[; <" LVDCON equ 0FD2h ;# ">
"7989
[; <" OSCCON equ 0FD3h ;# ">
"8072
[; <" T0CON equ 0FD5h ;# ">
"8142
[; <" TMR0 equ 0FD6h ;# ">
"8149
[; <" TMR0L equ 0FD6h ;# ">
"8156
[; <" TMR0H equ 0FD7h ;# ">
"8163
[; <" STATUS equ 0FD8h ;# ">
"8234
[; <" FSR2 equ 0FD9h ;# ">
"8241
[; <" FSR2L equ 0FD9h ;# ">
"8248
[; <" FSR2H equ 0FDAh ;# ">
"8255
[; <" PLUSW2 equ 0FDBh ;# ">
"8262
[; <" PREINC2 equ 0FDCh ;# ">
"8269
[; <" POSTDEC2 equ 0FDDh ;# ">
"8276
[; <" POSTINC2 equ 0FDEh ;# ">
"8283
[; <" INDF2 equ 0FDFh ;# ">
"8290
[; <" BSR equ 0FE0h ;# ">
"8297
[; <" FSR1 equ 0FE1h ;# ">
"8304
[; <" FSR1L equ 0FE1h ;# ">
"8311
[; <" FSR1H equ 0FE2h ;# ">
"8318
[; <" PLUSW1 equ 0FE3h ;# ">
"8325
[; <" PREINC1 equ 0FE4h ;# ">
"8332
[; <" POSTDEC1 equ 0FE5h ;# ">
"8339
[; <" POSTINC1 equ 0FE6h ;# ">
"8346
[; <" INDF1 equ 0FE7h ;# ">
"8353
[; <" WREG equ 0FE8h ;# ">
"8360
[; <" FSR0 equ 0FE9h ;# ">
"8367
[; <" FSR0L equ 0FE9h ;# ">
"8374
[; <" FSR0H equ 0FEAh ;# ">
"8381
[; <" PLUSW0 equ 0FEBh ;# ">
"8388
[; <" PREINC0 equ 0FECh ;# ">
"8395
[; <" POSTDEC0 equ 0FEDh ;# ">
"8402
[; <" POSTINC0 equ 0FEEh ;# ">
"8409
[; <" INDF0 equ 0FEFh ;# ">
"8416
[; <" INTCON3 equ 0FF0h ;# ">
"8508
[; <" INTCON2 equ 0FF1h ;# ">
"8585
[; <" INTCON equ 0FF2h ;# ">
"8702
[; <" PROD equ 0FF3h ;# ">
"8709
[; <" PRODL equ 0FF3h ;# ">
"8716
[; <" PRODH equ 0FF4h ;# ">
"8723
[; <" TABLAT equ 0FF5h ;# ">
"8732
[; <" TBLPTR equ 0FF6h ;# ">
"8739
[; <" TBLPTRL equ 0FF6h ;# ">
"8746
[; <" TBLPTRH equ 0FF7h ;# ">
"8753
[; <" TBLPTRU equ 0FF8h ;# ">
"8762
[; <" PCLAT equ 0FF9h ;# ">
"8769
[; <" PC equ 0FF9h ;# ">
"8776
[; <" PCL equ 0FF9h ;# ">
"8783
[; <" PCLATH equ 0FFAh ;# ">
"8790
[; <" PCLATU equ 0FFBh ;# ">
"8797
[; <" STKPTR equ 0FFCh ;# ">
"8873
[; <" TOS equ 0FFDh ;# ">
"8880
[; <" TOSL equ 0FFDh ;# ">
"8887
[; <" TOSH equ 0FFEh ;# ">
"8894
[; <" TOSU equ 0FFFh ;# ">
"7 system/fuses.h
[p x PLLDIV=4 ]
"8
[p x CPUDIV=OSC1_PLL2 ]
"9
[p x USBDIV=2 ]
"10
[p x FOSC=HSPLL_HS ]
"11
[p x FCMEN=OFF ]
"12
[p x IESO=OFF ]
"13
[p x PWRT=OFF ]
"14
[p x BOR=ON ]
"15
[p x BORV=3 ]
"16
[p x VREGEN=ON ]
"17
[p x WDT=OFF ]
"18
[p x WDTPS=32768 ]
"19
[p x MCLRE=ON ]
"20
[p x LPT1OSC=OFF ]
"21
[p x PBADEN=OFF ]
"23
[p x STVREN=ON ]
"24
[p x LVP=OFF ]
"26
[p x XINST=OFF ]
"27
[p x CP0=OFF ]
"28
[p x CP1=OFF ]
"31
[p x CPB=OFF ]
"33
[p x WRT0=OFF ]
"34
[p x WRT1=OFF ]
"37
[p x WRTB=OFF ]
"38
[p x WRTC=OFF ]
"40
[p x EBTR0=OFF ]
"41
[p x EBTR1=OFF ]
"44
[p x EBTRB=OFF ]
"59 system/system.h
[v _USBOutHandle `*Vv ~T0 @X0 1 e ]
"60
[v _USBInHandle `*Vv ~T0 @X0 1 e ]
[v $root$_main `(v ~T0 @X0 0 e ]
"63 main.c
[v _main `(v ~T0 @X0 1 ef ]
"64
{
[e :U _main ]
[f ]
"65
[e ( _USBDeviceInit ..  ]
"67
[e = _TRISB -> -> 31 `i `uc ]
"68
[e = _SYS_state -> -> 2 `i `uc ]
"69
[e = . . _LATBbits 0 5 -> -> 1 `i `uc ]
"70
[e = _PT0_BOOT -> -> 6 `i `uc ]
"72
[e ( _TMR0_1S_config ..  ]
"74
[e $U 418  ]
[e :U 419 ]
"75
{
"76
[e $ ! == -> . . _INTCONbits 0 2 `i -> 1 `i 421  ]
"77
{
"78
[e $ ! == -> =- _PT0_BOOT -> -> 1 `i `uc `i -> 0 `i 422  ]
"79
{
"80
[e = _SYS_state -> -> 1 `i `uc ]
"81
[e = . . _INTCONbits 0 2 -> -> 0 `i `uc ]
"82
[e = _T0CON -> -> 0 `i `uc ]
"83
}
[e :U 422 ]
"84
[e ( _TMR0_1S_config ..  ]
"85
[e = . . _LATBbits 0 5 -> ~ -> . . _LATBbits 0 5 `i `uc ]
"86
}
[e :U 421 ]
"88
[e ( _USBDeviceTasks ..  ]
"89
[e $ ! || < -> _USBDeviceState `i -> . `E3311 6 `i != -> . . _UCONbits 0 1 `i -> -> -> 0 `i `Vuc `i 423  ]
[e $U 418  ]
[e :U 423 ]
"90
[e = _USBOutHandle -> ( _USBTransferOnePacket (4 , , , -> -> 1 `i `uc -> -> 0 `i `uc &U *U + &U _ReceivedDataBuffer * -> -> -> 0 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux -> -> 64 `i `uc `*Vv ]
"91
[e $ ! && == -> *U + &U _ReceivedDataBuffer * -> -> -> 1 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux `i -> 2 `i == -> *U + &U _ReceivedDataBuffer * -> -> -> 2 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux `i -> 1 `i 424  ]
"92
{
"93
[e ( _boot ..  ]
"94
}
[e :U 424 ]
"96
}
[e :U 418 ]
"74
[e $ != -> _SYS_state `i -> 1 `i 419  ]
[e :U 420 ]
"97
[e ( _init_APP ..  ]
"98
[e :UE 417 ]
}
"100
[v _init_APP `(v ~T0 @X0 1 ef ]
"101
{
[e :U _init_APP ]
[f ]
"102
[e ( _TMR0_1S_config ..  ]
"103
[e $U 426  ]
[e :U 427 ]
[e :U 426 ]
[e $ == -> . . _INTCONbits 0 2 `i -> 0 `i 427  ]
[e :U 428 ]
"104
[e = . . _INTCONbits 0 2 -> -> 0 `i `uc ]
"105
[e = _T0CON -> -> 0 `i `uc ]
"107
[e = _LATB -> -> 0 `i `uc ]
"108
[e = _TRISB -> -> 255 `i `uc ]
"109
[; <" GOTO 0x6800 ;# ">
"110
[e :UE 425 ]
}
"112
[v _boot `TF3706 ~T0 @X0 1 e ]
"113
{
[e :U _boot ]
[f ]
"114
[e ( _response_event (2 , -> -> 2 `i `uc -> -> 1 `i `uc ]
"116
[e = . . _LATBbits 0 5 -> -> 1 `i `uc ]
"118
[e $U 430  ]
[e :U 431 ]
"119
{
"120
[e ( _HID_rx ..  ]
"122
[e $U 434  ]
"123
{
"124
[e :U 435 ]
"125
[e ( _Write_event ..  ]
"126
[e $U 433  ]
"127
[e :U 436 ]
"128
[e ( _erase_falsh ..  ]
"129
[e ( _response_event (2 , -> -> 7 `i `uc -> -> 2 `i `uc ]
"130
[e $U 433  ]
"131
[e :U 437 ]
"132
[e ( _Read_event ..  ]
"133
[e $U 433  ]
"134
[e :U 438 ]
"135
[e = _SYS_state -> -> 1 `i `uc ]
"136
[e ( _response_event (2 , -> -> 1 `i `uc -> -> 1 `i `uc ]
"137
[e $U 433  ]
"139
[e :U 439 ]
"140
[e $ ! == -> _SYS_state `i -> 8 `i 440  ]
"141
{
"142
[e =| _PORTB -> -> 224 `i `uc ]
"143
[e :U 442 ]
[e :U 441 ]
[e $U 442  ]
[e :U 443 ]
"144
}
[e :U 440 ]
"145
[e $U 433  ]
"146
}
[e $U 433  ]
"122
[e :U 434 ]
[e [\ *U + &U _ReceivedDataBuffer * -> -> -> 1 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux , $ -> -> 3 `i `uc 435
 , $ -> -> 7 `i `uc 436
 , $ -> -> 4 `i `uc 437
 , $ -> -> 1 `i `uc 438
 439 ]
"146
[e :U 433 ]
"147
[e = *U + &U _ReceivedDataBuffer * -> -> -> 1 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux -> -> 0 `i `uc ]
"148
}
[e :U 430 ]
"118
[e $ == -> _SYS_state `i -> 2 `i 431  ]
[e :U 432 ]
"149
[e :UE 429 ]
}
"151
[v _Write_event `TF3709 ~T0 @X0 1 e ]
"152
{
[e :U _Write_event ]
[f ]
"153
[v _i `uc ~T0 @X0 1 a ]
"154
[e ( _response_event (2 , -> -> 3 `i `uc -> -> 1 `i `uc ]
"156
[e = _SYS_state -> -> 3 `i `uc ]
"157
[e =| _PORTB -> -> 224 `i `uc ]
"159
[e $U 445  ]
[e :U 446 ]
"160
{
"161
[e ( _HID_rx ..  ]
"162
[e $U 449  ]
"163
{
"164
[e :U 450 ]
"165
[e = _i ( _flash_write_B32 ..  ]
"166
[e ( _response_event (2 , -> -> 3 `i `uc _i ]
"167
[e = _PORTB -> & ~ & -> _PORTB `i -> 224 `i | -> _PORTB `i -> 224 `i `uc ]
"168
[e $U 448  ]
"170
[e :U 451 ]
"171
[e = _SYS_state -> -> 2 `i `uc ]
"172
[e ( _response_event (2 , -> -> 3 `i `uc -> -> 2 `i `uc ]
"173
[e $U 448  ]
"175
[e :U 452 ]
"176
[e $ ! == -> *U + &U _ReceivedDataBuffer * -> -> -> 1 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux `i -> 8 `i 453  ]
"177
{
"179
[e = _SYS_state -> -> 8 `i `uc ]
"180
}
[e :U 453 ]
"181
[e $U 448  ]
"182
}
[e $U 448  ]
"162
[e :U 449 ]
[e [\ *U + &U _ReceivedDataBuffer * -> -> -> 2 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux , $ -> -> 3 `i `uc 450
 , $ -> -> 2 `i `uc 451
 452 ]
"182
[e :U 448 ]
"184
[e = *U + &U _ReceivedDataBuffer * -> -> -> 1 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux -> -> 0 `i `uc ]
"185
[e = *U + &U _ReceivedDataBuffer * -> -> -> 2 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux -> -> 0 `i `uc ]
"187
}
[e :U 445 ]
"159
[e $ == -> _SYS_state `i -> 3 `i 446  ]
[e :U 447 ]
"188
[e =& _PORTB -> -> 31 `i `uc ]
"189
[e = . . _LATBbits 0 5 -> -> 1 `i `uc ]
"190
[e :UE 444 ]
}
"192
[v _Read_event `TF3712 ~T0 @X0 1 e ]
"193
{
[e :U _Read_event ]
[f ]
"194
[v _i `uc ~T0 @X0 1 a ]
"195
[e ( _response_event (2 , -> -> 4 `i `uc -> -> 1 `i `uc ]
"197
[e = _SYS_state -> -> 4 `i `uc ]
"198
[e = . . _LATBbits 0 6 -> -> 1 `i `uc ]
"200
[e $U 455  ]
[e :U 456 ]
"201
{
"202
[e ( _HID_rx ..  ]
"203
[e $U 459  ]
"204
{
"205
[e :U 460 ]
"206
[e ( _flash_read_byte ..  ]
"207
[e ( _response_event (2 , -> -> 4 `i `uc -> -> 3 `i `uc ]
"208
[e = _PORTB -> & ~ & -> _PORTB `i -> 224 `i | -> _PORTB `i -> 224 `i `uc ]
"209
[e $U 458  ]
"211
[e :U 461 ]
"212
[e = _SYS_state -> -> 2 `i `uc ]
"213
[e ( _response_event (2 , -> -> 4 `i `uc -> -> 2 `i `uc ]
"214
[e $U 458  ]
"216
[e :U 462 ]
"217
[e $U 458  ]
"218
}
[e $U 458  ]
"203
[e :U 459 ]
[e [\ *U + &U _ReceivedDataBuffer * -> -> -> 2 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux , $ -> -> 3 `i `uc 460
 , $ -> -> 2 `i `uc 461
 462 ]
"218
[e :U 458 ]
"220
[e = *U + &U _ReceivedDataBuffer * -> -> -> 1 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux -> -> 0 `i `uc ]
"221
[e = *U + &U _ReceivedDataBuffer * -> -> -> 2 `i `ui `ux -> -> # *U &U _ReceivedDataBuffer `ui `ux -> -> 0 `i `uc ]
"223
}
[e :U 455 ]
"200
[e $ == -> _SYS_state `i -> 4 `i 456  ]
[e :U 457 ]
"224
[e =& _PORTB -> -> 31 `i `uc ]
"225
[e = . . _LATBbits 0 5 -> -> 1 `i `uc ]
"226
[e :UE 454 ]
}