Using Xous as a secure bootloader #222
Replies: 2 comments
-
I believe it is worth to mention that Fobnail Project is sponsored by NLNet and there are some USB token companies interested in including feature in their produce. Even if initially Xous would not be supported by Fobnail Project maybe there could be a value to create in long term for some workloads. We envision various DLME OSes for various use cases. I assume sooner or later RISC-V will gain D-RTM capabilities, it is probably matter of correct implementation (probably in SBI 🤔 ) - at least other architectures x86 (both Intel and AMD), Arm (recently published spec) and OpenPOWER (my presentation from tpm.dev miniconf) already have some support for D-RTM. |
Beta Was this translation helpful? Give feedback.
-
Thanks for the interest in Xous! The kernel was designed with other architectures in mind. The requirements for a Xous port are as follows:
I believe x86 should be able to satisfy both requirements. We already support some variant of "x86" in that "hosted" mode is actually another architecture entirely. On RISC-V we pass arguments to and from the kernel using 8 To address your requirements in-order:
|
Beta Was this translation helpful? Give feedback.
-
Hello
We are interested in using Xous as a secure bootloader in the Fobnail project. Mainly on RISC-V platforms, however if Xous had support for x86 and architectures we would consider using it there too. Do you plan to add support for architectures other than RISC-V? We saw there is already a dummy x86 implementation, do you plan to extend it?
We'd like to use it as mini OS that would communicate with a device called Fobnail Token in order verify integrity of the target OS and boot it if verification passes.
We need the following things
code in kernel mode
Do you plan to implement this? Could you also take a look at our research regarding Xous, is there anything more we should know about?
Beta Was this translation helpful? Give feedback.
All reactions