diff --git a/docs/tests/plugins/index.rst b/docs/tests/plugins/index.rst index ffd245d65..2ca326cbf 100644 --- a/docs/tests/plugins/index.rst +++ b/docs/tests/plugins/index.rst @@ -10,7 +10,13 @@ Contents :includehidden: :maxdepth: 3 + swiot1l/swiot1l_tests + m2k/digital_io_tests + m2k/logic_analyzer_tests + m2k/power_supply_tests + .. add the path to each plugin test case here example dac/dac_tests + diff --git a/docs/tests/plugins/m2k/digital_io_tests.rst b/docs/tests/plugins/m2k/digital_io_tests.rst new file mode 100644 index 000000000..b2e196259 --- /dev/null +++ b/docs/tests/plugins/m2k/digital_io_tests.rst @@ -0,0 +1,122 @@ +.. _digital_io_tests: + +Digital IO - Test Suite +======================== + +.. note:: + + User guide: :ref:`Digital IO user guide` + +The Digital IO tests are a set of tests that are run to verify the +Digital IO instrument of the ADALM2000 plugin in Scopy. + +The following apply for all the test cases in this suite. +If the test case has special requirements, they will be listed in the test case section. + +Setup environment: +------------------ + +.. _adalm2000_device_digital_setup: + +**Adalm2000.Device:** + - Open Scopy. + - Connect the ADALM2000 device to the system. + - Connect the ADALM2000 device in Scopy using the USB/network backend. + - Connect loopback cables between DIO 0-7 and DIO 8-15 using the pinout diagram. + +Depends on: + - Test TST.EMU.CONNECT + - Test TST.PREFS.RESET + +Prerequisites: + - Scopy v2.0.0 or later with ADALM2000 plugin installed on the system. + - Tests listed as dependencies are successfully completed. + - Reset .ini files to default using the Preferences "Reset" button. + +Test 1 - Check individual digital pin state +---------------------------------------------------- + +.. _TST.DIO.INDIVIDUAL: + +UID: + TST.DIO.INDIVIDUAL + +Description: + This test verifies that the individual digital pins are working correctly. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the DigitalIO instrument. + 2. Set DIO 0-7 and DIO 8-15 as individual pins using the combo box. + 3. Set DIO Channel 0 as **output**. + 4. Set DIO Channel 7 as **input**. + 5. Change the logic state of DIO 0 (0/1) multiple times and monitor DIO 7 state. + - **Expected Result**: + - When DIO 0 is set to logic 1, DIO 7 will be automatically set to logic 1 + (the corresponding led will be turned on). + - When DIO 0 is set to logic 0, DIO 7 will be automatically set to logic 0 + (the corresponding led will be turned off). + 6. Connect DIO 0 to a the analog pin **1+** and DIO 7 to the positive power + supply **V+** using the pinout diagram attached in resources. + 7. Set DIO 0 to logic 0 and open the :ref:`Voltmeter` instrument. + Start the instrument and monitor the voltage value on Channel 1. + + - **Expected Result**: + - The voltage displayed on the voltmeter is between -0.050V and 0.4V. + 8. Set DIO 0 to logic 1 and monitor the voltage value on Channel 1. Start the instrument. + - **Expected Result**: + - The voltage displayed on the voltmeter is between 2.9V and 3.4V. + 9. Open the `Power Supply instrument` and set the positive + power supply to a voltage level between 0V and 0.8V. + Monitor the DIO 7 logic state. + + - **Expected Result**: + - DIO 7 indicates logic 0 level. + 10. Open the `Power Supply instrument` and set the positive + power supply to a voltage level between 2V and 3.3V. + Monitor the DIO 7 logic state. + + - **Expected Result**: + - DIO 7 indicates logic 1 level. + 11. Repeat steps 6 to 11 using DIO 8 as **output** (for step 3) and + DIO 1 as **input** for (step 4). + + - **Expected Result**: + - All the expected results in step 6 to 11 are met. + +Test 2 - Checking grouped digital pin states +---------------------------------------------------- + +.. _TST.DIO.GROUP: + +UID: + TST.DIO.GROUP + +Description: + This test verifies that the grouped digital pins DIO 0-7 and DIO 8-15 + are working correctly. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the DigitalIO instrument. + 2. Set DIO 0-7 and DIO 8-15 as Group pins using the combo box. + 3. Set DIO 0-7 as **output** and DIO 8-15 as **input**. + 4. Set DIO 0-7 to value 0. + - **Expected Result**: + - DIO 8-15 value indicates the same value as DIO 0-7 group. + 5. Set DIO 0-7 to value 128. + - **Expected Result**: + - DIO 8-15 value indicates the same value as DIO 0-7 group. + 6. Set DIO 0-7 as **input** and DIO 8-15 as **output**. + 7. Set DIO 8-15 to value 0. + - **Expected Result**: + - DIO 0-7 value indicates the same value as DIO 8-15 group. + 8. Set DIO 8-15 to value 128. + - **Expected Result**: + - DIO 0-7 value indicates the same value as DIO 8-15 group. diff --git a/docs/tests/plugins/m2k/logic_analyzer_tests.rst b/docs/tests/plugins/m2k/logic_analyzer_tests.rst new file mode 100644 index 000000000..50a519cb0 --- /dev/null +++ b/docs/tests/plugins/m2k/logic_analyzer_tests.rst @@ -0,0 +1,600 @@ +.. _logic_analyzer_tests: + +Logic Analyzer - Test Suite +=========================== + +.. note:: + + User guide: :ref:`Logic Analyzer user guide` + +The Logic Analyzer tests are a set of tests that are run to verify the +Logic Analyzer instrument of the ADALM2000 plugin in Scopy. + +The following apply for all the test cases in this suite. +If the test case has special requirements, they will be listed in the test case section. + +Setup environment: +------------------ + +.. _adalm2000_device_setup: + +**Adalm2000.Device:** + - Open Scopy. + - Connect the ADALM2000 device to the system. + - Connect the ADALM2000 device in Scopy using the USB/network backend. + - Connect **W1** to **1+** and **GND** to **1-** using the pinout diagram. + +Depends on: + - Test TST.EMU.CONNECT + - Test TST.PREFS.RESET + +Prerequisites: + - Scopy v2.0.0 or later with ADALM2000 plugin installed on the system. + - Tests listed as dependencies are successfully completed. + - Reset .ini files to default using the Preferences "Reset" button. + +Test 1 - Channel Trigger Function +--------------------------------------------- + +.. _TST.LOGIC.CHN_TRIGGER: + +UID: + TST.LOGIC.CHN_TRIGGER + +Description: + This test verifies the basic trigger functionality on individual + digital channels - rising edge, falling edge, high, low, any edge. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Enable DIO 0 and DIO 1 on the Logic Analyzer. + 3. Set the following parameters: + - Sample rate to 50ksps. + - Sample delay of -142 samples. + 4. Open the `Pattern Generator` instrument and enable DIO 1. + Set the following parameters: + + - Pattern: clock. + - Frequency: 100Hz. + - Phase: 0 degrees. + - Duty Cycle: 50%. + 5. Open the `Digital IO` instrument and set DIO 0 as output. + 6. In the Logic Analyzer set DIO0’s trigger to **rising edge** configuration. + 7. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 8. In the Digital IO, change DIO0’s output from 0 to 1. + - **Expected Result**: + - The logic analyzer initiates a capture. + 9. Stop the Logic Analyzer and set DIO0’s trigger to **rising edge** configuration. + 10. Run the Logic Analyzer instrument. + 11. In the Digital IO, change DIO0’s output from 1 to 0. + - **Expected Result**: + - The logic analyzer initiates a capture. + 12. Stop the Logic Analyzer and set DIO0’s trigger to **any edge** configuration. + 13. Run the Logic Analyzer instrument. + 14. In the Digital IO, change DIO0’s output from 0 to 1 or 1 to 0. + - **Expected Result**: + - The logic analyzer initiates a capture. + 15. Stop the Logic Analyzer and set DIO0’s trigger to **low** configuration. + 16. Run the Logic Analyzer instrument. + 17. In the Digital IO, set DIO0’s output to 0. + - **Expected Result**: + - The logic analyzer continuously captures the signal. + 18. Stop the Logic Analyzer and set DIO0’s trigger to **high** configuration. + 19. Run the Logic Analyzer instrument. + 20. In the Digital IO, set DIO0’s output to 1. + - **Expected Result**: + - The logic analyzer continuously captures the signal. + +Test 2 - External Channel Trigger Function +--------------------------------------------- + +.. _TST.LOGIC.EXT_CHN_TRIGGER: + +UID: + TST.LOGIC.EXT_CHN_TRIGGER + +Description: + This test verifies the external trigger functionality. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Enable DIO 0 and DIO 1 on the Logic Analyzer. + 3. Set the following parameters: + - Sample rate to 50ksps. + - Sample delay of -142 samples. + 4. Open the `Pattern Generator` instrument and enable DIO 1. + Set the following parameters: + + - Pattern: clock. + - Frequency: 100Hz. + - Phase: 0 degrees. + - Duty Cycle: 50%. + 5. Open the `Digital IO` instrument and set DIO 0 as output. + 6. Open the Logic Analyzer trigger menu and turn on the External trigger. + Select the source as **External Trigger In**. + + - **Expected Result**: + - Triggers set on every DIO channels are automatically turned off. + 7. Connect Trigger in 1 to DIO0 using a loopback cable. + 8. In the Logic Analyzer Trigger settings menu set the External Trigger In condition + to **rising edge**. + 9. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 10. In the Digital IO, change DIO0’s output from 0 to 1. + - **Expected Result**: + - The logic analyzer initiates a capture. + 11. Stop all instruments and set the External Trigger In condition to **falling edge**. + 12. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 13. In the Digital IO, change DIO0’s output from 1 to 0. + - **Expected Result**: + - The logic analyzer initiates a capture. + 14. Stop all instruments and set the External Trigger In condition to **any edge**. + 15. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 16. In the Digital IO, change DIO0’s output from 0 to 1 or 1 to 0. + - **Expected Result**: + - The logic analyzer initiates a capture. + 17. Stop all instruments and set the External Trigger In condition to **low**. + 18. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 19. In the Digital IO, set DIO0’s output to 0. + - **Expected Result**: + - The logic analyzer continuously captures the signal. + 20. Stop all instruments and set the External Trigger In condition to **high**. + 21. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 22. In the Digital IO, set DIO0’s output to 1. + - **Expected Result**: + - The logic analyzer continuously captures the signal. + +Test 3 - Oscilloscope Source External Trigger +--------------------------------------------- + +.. _TST.LOGIC.OSC_EXT_TRIGGER: + +UID: + TST.LOGIC.OSC_EXT_TRIGGER + +Description: + This test verifies the external trigger functionality using the Oscilloscope as the source. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Enable DIO 0 and DIO 1 on the Logic Analyzer. + 3. Set the following parameters: + - Sample rate to 50ksps. + - Sample delay of -142 samples. + 4. Open the Logic Analyzer trigger menu and turn on the External trigger. + Select the source as **Oscilloscope**. + 5. Open the `Signal Generator` instrument and generate a sinewave + with the following parameters: + + - Peak-to-peak: 2V. + - Frequency: 200Hz. + 6. Open the `Oscilloscope` instrument and set the trigger to **normal** + and condition to **rising edge**. + 7. Run the Signal Generator, Oscilloscope and Logic Analyzer instrument and verify if the + Logic Analyzer is triggered at the same time with the Oscilloscope. + + - **Expected Result**: + - The Oscilloscope is triggered when the two blue Trigger cursors are intersected + on the rising edge of the signal. + - If you drag the horizontal cursor in the Oscilloscope window above or + below the signal, it should be in Waiting state, and Logic analyzer will + be Waiting too. + 8. Open the Oscilloscope trigger menu and set the trigger condition to **falling edge**. + 9. Verify that the Logic Analyzer is triggered at the same time with the Oscilloscope. + - **Expected Result**: + - If you drag the horizontal cursor in the Oscilloscope window above or + below the signal, it should be in Waiting state, and Logic analyzer will + be Waiting too. + 10. Open the Oscilloscope trigger menu and set the trigger condition to **low**. + 11. Verify that the Logic Analyzer is triggered at the same time with the Oscilloscope. + - **Expected Result**: + - If you drag the horizontal cursor in the Oscilloscope window above or + below the signal, it should be in Waiting state, and Logic analyzer will + be Waiting too. + 12. Open the Oscilloscope trigger menu and set the trigger condition to **high**. + 13. Verify that the Logic Analyzer is triggered at the same time with the Oscilloscope. + - **Expected Result**: + - If you drag the horizontal cursor in the Oscilloscope window above or + below the signal, it should be in Waiting state, and Logic analyzer will + be Waiting too. + +Test 4 - Trigger Modes +--------------------------------------------- + +.. _TST.LOGIC.TRIGGER_MODES: + +UID: + TST.LOGIC.TRIGGER_MODES + +Description: + This test verifies the trigger modes (and/or) of the Logic Analyzer. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Enable DIO 0, DIO 1 and DIO 2 on the Logic Analyzer. + 3. Set the following parameters: + - Sample rate to 50ksps. + - Sample delay of -142 samples. + 4. Open the `Pattern Generator` instrument and enable DIO 2. + Set the following parameters: + + - Pattern: clock. + - Frequency: 5KHz. + 5. Open the `Digital IO` instrument and set DIO 0 and DIO 1 as output. + 6. In the Logic Analyzer trigger settings set DIO 0 and DIO 1 trigger conditions + to **HIGH** and disable the External trigger. + 7. In the Logic Analyzer trigger configuration, set the trigger logic to **OR**. + 8. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 9. In the Digital IO instrument set DIO0’s output to 0 and DIO1’s output to 0. + - **Expected Result**: + - The logic analyzer does not start capturing. + 10. In the Digital IO instrument set DIO0 or DIO1’s output to 1. + - **Expected Result**: + - The logic analyzer starts capturing signal when either of the DIO0 OR DIO1 is HIGH. + 11. Stop all instruments and set the trigger logic to **AND**. + 12. Run the Digital IO, Pattern Generator and Logic Analyzer instrument. + 13. In the Digital IO instrument set DIO0’s output to 0 and DIO1’s output to 1. + - **Expected Result**: + - The logic analyzer does not start capturing. + 14. In the Digital IO instrument set DIO0 and DIO1’s output to 1. + - **Expected Result**: + - The logic analyzer starts capturing signal only when DIO0 AND DIO1 are HIGH. + +Test 5 - Clock signal measurement accuracy +--------------------------------------------- + +.. _TST.LOGIC.CLOCK_SIGNAL: + +UID: + TST.LOGIC.CLOCK_SIGNAL + +Description: + This test verifies the accuracy of the clock signal measurement. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Enable DIO 0 on the Logic Analyzer. + 3. Set the following parameters: + - Sample rate to 50ksps. + - Enable the cursor. + 4. Open the `Pattern Generator` instrument and enable DIO 0. + Set the following parameters: + + - Pattern: clock. + - Frequency: 100Hz. + - Phase: 0 degrees. + - Duty Cycle: 50%. + 5. Run a single capture of the Logic Analyzer and move the cursor handles to the + consecutive rising edges or consecutive falling edges of the signal. + + - **Expected Result**: + - The data measured by the cursor is close to ∆t: 10ms and 1/∆t: 100Hz. + 6. In the Cursors settings menu enable **Cursors lock** and measure the next + set of edges. + + - **Expected Result**: + - The data measured by the cursor is close to ∆t: 10ms and 1/∆t: 100Hz. + 7. Set the Logic Analyzer sample rate to 100Msps and position to 0s. + 8. Set the Pattern Generator DIO 0 parameters to: + - Pattern: clock. + - Frequency: 2.5MHz. + 9. Run a single capture of the Logic Analyzer and move the cursor handles to the + consecutive rising edges or consecutive falling edges of the signal. + + - **Expected Result**: + - The data measured by the cursor is close to ∆t: 400ns and 1/∆t: 2.5MHz. + 10. In the Cursors settings menu enable **Cursors lock** and measure the next + set of edges. + + - **Expected Result**: + - The data measured by the cursor is close to ∆t: 400ns and 1/∆t: 2.5MHz. + 11. Set the Logic Analyzer sample rate to 20ksps. + 12. Set the Pattern Generator DIO 0 parameters to: + - Pattern: clock. + - Frequency: 100Hz. + - Duty Cycle: 70%. + 13. Run a single capture of the Logic Analyzer and move the cursor handles to the + rising and falling edge of the upper limit. + + - **Expected Result**: + - The data measured by the cursor is close to ∆t: 7ms. + 14. Move the cursors to the falling and rising edge of the lower limit. + - **Expected Result**: + - The data measured by the cursor is close to ∆t: 3ms. + + +Test 6 - Parallel Decoder +--------------------------------------------- + +.. _TST.LOGIC.PARALLEL_DECODER: + +UID: + TST.LOGIC.PARALLEL_DECODER + +Description: + This test verifies the parallel decoder functionality. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Add a parallel decoder from the main settings menu and set the following parameters: + - Clock line to DIO8. + - Data lines 0-7 to DIO0 to DIO7. + 3. Open the Pattern Generator instrument and group DIO0 to DIO7 as number pattern. + Enable DIO8 and set it to Clock with 500Hz frequency. + Set the number value to 50 (it is read as decimal). + 4. Run the Pattern Generator and Logic Analyzer instrument. + 5. Verify the Logic Analyze decoded value. + - **Expected Result**: + - The reading is in hex format. For reference, 50 decimal = 32 hex. + 6. In the Pattern Generator set the number value to 250. + 7. Verify the Logic Analyzer decoded value. + - **Expected Result**: + - The reading is in hex format. For reference, 250 decimal = FA. + +Test 7 - SPI decoder +--------------------------------------------- + +.. _TST.LOGIC.SPI_DECODER: + +UID: + TST.LOGIC.SPI_DECODER + +Description: + This test verifies the SPI decoder functionality. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Add an SPI decoder from the main settings menu and set the following parameters: + - Clock line to DIO0. + - MISO line to DIO1. + - MOSI line to DIO2. + - CS# line to DIO3. + 3. Set DIO2’s trigger to falling edge. + 4. Open the Pattern Generator instrument and group DIO0 to DIO2 as SPI. + Set the following parameters: + + - Frequency: 5kHz. + - Bytes per frame: 2. + - Interframe space: 4. + - Data: insert 4 bytes in hex form e.g: AB CD EF 15. + 5. Run the Pattern Generator and Logic Analyzer instrument. + 6. Verify the Logic Analyzer plot for the decoder output: + - **Expected Result**: + - The MISO data has 2 bytes per frame and the decoded data is + AB CD EF 15. + + +Test 8 - UART decoder +--------------------------------------------- + +.. _TST.LOGIC.UART_DECODER: + +UID: + TST.LOGIC.UART_DECODER + +Description: + This test verifies the UART decoder functionality. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument and set time base to 1 ms. + 2. Add a UART decoder from the main settings menu and set the following parameters: + - TX line to DIO0. + - RX line to DIO1. + - Baud rate to 9600. + - Data bits to 8. + - Data format to ASCII. + - Partity type to none. + - Stop bits to 1. + - Bit order to lsb-first. + 3. Set DIO0's trigger to falling edge. + 4. Open the Pattern Generator instrument and group DIO0 as UART. + Set the following parameters: + + - Baud rate: 9600. + - Stop bit to 1. + - Parity to none. + - Data to send: M2K. + 5. Connect DIO0 to DIO1 using a loopback cable. + 6. Run the Pattern Generator and Logic Analyzer instrument. + 7. Verify the Logic Analyzer plot for the decoder output: + - **Expected Result**: + - The RX decoded data is "M2K". + 8. In the Pattern Generator change the baud rate to 115200. + 9. Verify the Logic Analyzer plot for the decoder output: + - **Expected Result**: + - The RX decoded data is not "M2K". + 10. In the Logic Analyzer change the baud rate to 115200: + - **Expected Result**: + - The RX decoded data is "M2K". + +Test 9 - PWM Decoder +--------------------------------------------- + +.. _TST.LOGIC.PWM_DECODER: + +UID: + TST.LOGIC.PWM_DECODER + +Description: + This test verifies the PWM decoder functionality. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Add a PWM decoder from the main settings menu and set the following parameters: + - Data line to DIO0. + - Polarity to active-high. + 3. In the Pattern Generator instrument, set DIO0 to Clock with 100 Hz frequency + and set the duty cycle to 5%, 30%, 50%, 75% and 95% verifying the Logic Analyzer + decoded data in between changes: + + - **Expected Result**: + - The data follows the duty cycle set in the pattern generator. + +Test 10 - Channel visual representation +--------------------------------------------- + +.. _TST.LOGIC.CHN_VISUAL: + +UID: + TST.LOGIC.CHN_VISUAL + +Description: + This test verifies changing the channel name, trace height and plot color. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer instrument. + 2. Enable DIO0 and open the channel settings by double clicking + the channel handle. + 3. Change the channel name to "D0" and verify the channel handle: + - **Expected Result**: + - The channel handle displays "D0". + 4. Change the trace height to 50: + - **Expected Result**: + - The trace height on the plot is doubled. + 5. Change the color to **transparent** and verify the channel on plot: + - **Expected Result**: + - The channel is no longer seen on the plot. + +Test 11 - Export Functionality +--------------------------------------------- + +.. _TST.LOGIC.EXPORT: + +UID: + TST.LOGIC.EXPORT + +Description: + This test verifies the data export functionality of the Logic Analyzer. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Pattern Generator and set two consecutive channels with similar + configurations: + + - DIO0 and DIO1: Pattern: Clock, Frequency: 100Hz, Phase: 0 and Duty Cycle: 50%. + - DIO2 and DIO3: Pattern: Clock, Frequency: 300Hz, Phase: 0 and Duty Cycle: 50%. + - DIO4 and DIO5: Pattern: Clock, Frequency: 500Hz, Phase: 0 and Duty Cycle: 50%. + - DIO6 and DIO7: Pattern: Clock, Frequency: 150Hz, Phase: 0 and Duty Cycle: 80%. + - DIO8 and DIO9: Pattern: Clock, Frequency: 200Hz, Phase: 0 and Duty Cycle: 20%. + - Group DIO10 to DIO15: Pattern: Number Pattern and Data: 50. + 2. Run the Logic Analyzer and Pattern Generator. + 3. In the Logic Analyzer General Settings menu set the Export All to **On** and + click the Export button. + 4. Select the file name, location and choose .csv format. + - **Expected Result**: + - The file is created in the specified location. + 5. Open the file and verify the data: + - **Expected Result**: + - The exported data is in .csv format and correspods to the data on the plot. + +Test 12 - Print Plot +--------------------------------------------- + +.. _TST.LOGIC.PRINT_PLOT: + +UID: + TST.LOGIC.PRINT_PLOT + +Description: + This test verifies the print plot functionality of the Logic Analyzer. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Logic Analyzer and set the time base to 5 ms. + 2. Open the Pattern Generator and set two consecutive channels with similar + configurations: + + - DIO0 and DIO1: Pattern: Clock, Frequency: 100Hz, Phase: 0 and Duty Cycle: 50%. + 3. Run the Logic Analyzer and Pattern Generator. + 4. Press the Print Plot button and choose a location for the exported file: + - **Expected Result**: + - The file is created in the specified location. + 5. Open the .pdf exported file and visually compare it to the application plot. + +Test 13 - Decoder Table +--------------------------------------------- + +.. _TST.LOGIC.DECODER_TABLE: + +UID: + TST.LOGIC.DECODER_TABLE + +Description: + This test verifies the decoder table functionality of the Logic Analyzer. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Pattern Generator and set the following parameters: + - DIO 0: UART, Baud rate: 9600, Data to Send: 123. + 2. Open the Logic Analyzer, enable DIO 0 and add a UART decoder with the + following parameters: + + - RX on channel 0. + - Baud rate: 9600. + - Data format: ASCII. + 3. In the General Settings set the sample rate to 1Msps and nb of samples to 10k samples. + 4. Run the Pattern Generator and Logic Analyzer. + 5. In the Logic Analyzer open the Decoder Table using the right side Decode menu. + Set the following parameters: + + - Group by: RX data. + - Group size: 3. + - Filter out all except for RX data. + 6. Check the decoder table: + - **Expected Result**: + - Each table row has RX data and time annotations. + - The RX data corresponds to the data sent by the Pattern Generator. + 7. Write "^3$" in the Regex search box and press Enter. + - **Expected Result**: + - Only the RX data equal to "3" is displayed in the table. + 8. Double click on the first RX data row of the decoder table: + - **Expected Result**: + - The plot is zoomed in and centered on the corresponding data. \ No newline at end of file diff --git a/docs/tests/plugins/m2k/power_supply_tests.rst b/docs/tests/plugins/m2k/power_supply_tests.rst new file mode 100644 index 000000000..ae019afbc --- /dev/null +++ b/docs/tests/plugins/m2k/power_supply_tests.rst @@ -0,0 +1,151 @@ +.. _power_supply_tests: + +Power Supply - Test Suite +========================= + +.. note:: + + User guide :ref:`Power Supply user guide` + +The Power Supply tests are a set of tests that are run to verify the Power Supply +instrument of the ADALM2000 plugin in Scopy. + +The following apply for all the test cases in this suite. +If the test case has special requirements, they will be listed in the test case section. + +Setup environment: +------------------ + +.. _adalm2000_device_setup: + +**Adalm2000.Device:** + - Open Scopy. + - Connect the ADALM2000 device to the system. + - Connect the ADALM2000 device in Scopy using the USB/network backend. + +Depends on: + - Test TST.EMU.CONNECT + - Test TST.PREFS.RESET + +Prerequisites: + - Scopy v2.0.0 or later with ADALM2000 plugin installed on the system. + - Tests listed as dependencies are successfully completed. + - Reset .ini files to default using the Preferences "Reset" button. + - Connect **V+** to **1+** and **V-** to **1-** on the ADALM2000 device + using loopback cables. + +Test 1 - Check positive voltage output +-------------------------------------- + +.. _TST.PS.POSITIVE: + +UID: + TST.PS.POSITIVE + +Description: + This test verifies that the positive voltage output is working correctly. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Power Supply instrument. + 2. Set Tracking ratio control to Independent Controls. + 3. Set the positive value to 3.3V and click enable. + 4. Monitor the power supply output with voltmeter. + - **Expected Result**: + - The voltmeter reads values between 3.25V and 3.35V. + 5. Change the power supply output value to 1.8V. + - **Expected Result**: + - The voltmeter reads values between 1.75V and 1.85V. + 6. Change the power supply output value to 5V. + - **Expected Result**: + - The voltmeter reads values between 4.95V and 5.05V. + +Test 2 - Check negative voltage output +-------------------------------------- + +.. _TST.PS.NEGATIVE: + +UID: + TST.PS.NEGATIVE + +Description: + This test verifies that the negative voltage output is working correctly. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Power Supply instrument. + 2. Set Tracking ratio control to Independent Controls. + 3. Set the negative value to -3.3V and click enable. + 4. Monitor the power supply output with voltmeter. + - **Expected Result**: + - The voltmeter reads values between -3.25V and -3.35V. + 5. Change the power supply output value to -1.8V. + - **Expected Result**: + - The voltmeter reads values between -1.75V and -1.85V. + 6. Change the power supply output value to -5V. + - **Expected Result**: + - The voltmeter reads values between -4.95V and -5.05V. + +Test 3 - Check fine tuning +--------------------------- + +.. _TST.PS.FINE_TUNING: + +UID: + TST.PS.FINE_TUNING + +Description: + This test verifies that the fine tuning of the power supply is working correctly. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Power Supply instrument. + 2. Set Tracking ratio control to Independent Controls. + 3. Set the knob to ±1V interval. No orange dot on the center. + 4. Set value to 3V. Then use +/- sign to change value with ±1V interval. + - **Expected Result**: + - The value changes accordingly. Set Value ± 1V = the new value. + 5. Set the knob to ±100mV interval. Orange dot seen on the center. + 6. Set value to 300mV. Then use +/- sign to change value with ±100mV interval. + - **Expected Result**: + - The value changes accordingly. Set Value ± 100mV = the new value. + +Test 4 - Check Tracking mode + +.. _TST.PS.TRACKING: + +UID: + TST.PS.TRACKING + +Description: + This test verifies that the Tracking mode of the power supply is working correctly. + +Preconditions: + - :ref:`Adalm2000.Device` + - OS: ANY + +Steps: + 1. Open the Power Supply instrument. + 2. Set Tracking ratio control to Tracking. + 3. Set the positive output to 5V. Set tracking ratio to 50%. + - Expected Result: + - The negative output value is automatically set to -2.5V. + 4. Set the tracking ratio to 100%: + - Expected Result: + - The negative output value is automatically set to -5V. + 5. Set the tracking ratio to 0%: + - Expected Result: + - The negative output value is automatically set to 0mV. + 6. Set Tracking ratio control to Independent. + 7. Set the positive output to 5V and verify the negative output: + - Expected Result: + - The negative output value does not change. \ No newline at end of file diff --git a/docs/tests/plugins/swiot1l/swiot1l_tests.rst b/docs/tests/plugins/swiot1l/swiot1l_tests.rst new file mode 100644 index 000000000..7515d9bf2 --- /dev/null +++ b/docs/tests/plugins/swiot1l/swiot1l_tests.rst @@ -0,0 +1,65 @@ +.. _swiot1l_tests: + +SWIOT Plugin - Test Cases +========================= + +The SWIOT plugin tests are a set of tests that are used to verify the functionality of the SWIOT plugin. +The tests are designed to be run in a specific order to ensure that the plugin is functioning correctly. +The tests are divided into two main categories: **CONFIG** AND **RUNTIME**. + +The following apply for all the test cases in this suite. +If the test case has special requirements, they will be listed in the test case section. + +Depends on: + - Test TST.EMU.CONNECT + - Test TST.PREFS.RESET + +Prerequisites: + - Scopy v2.0.0 or later with SWIOT plugin installed on the system. + - Tests listed as dependencies are successfully completed. + - Reset .ini files to default using the Preferences "Reset" button. + +Test 1 - TST.SWIOT.COMPAT +------------------------- + +Title: + Test SWIOT plugin compatibility with device. + +UID: + TST.SWIOT.COMPAT + +Description: + This test verifies that the SWIOT plugin is compatible with the + selected device and that the plugin is able to correctly parse it. + +Steps: + 1. Open Scopy. + 2. Start the IIO-EMU process and connect to **swiot_config**. + 3. Open the SWIOT plugin - Config Instrument. + 4. Select the device from the device list. + +Test 2 - TST.SWIOT.CONFIG +------------------------- + +Title: + Test SWIOT plugin configuration. + +UID: + TST.SWIOT.CONFIG + +Description: + This test verifies that the SWIOT plugin is able to configure the device + correctly. + +Steps: + 1. Open Scopy. + 2. Start the IIO-EMU process and connect to **swiot_config**. + 3. Open the SWIOT plugin - Config Instrument. + 4. Configure the device with the following settings: + - **Setting 1**: Value 1 + - **Setting 2**: Value 2 + - **Setting 3**: Value 3 + + + +